Lines Matching defs:Ld1

224     bool AreSequentialLoads(LoadInst *Ld0, LoadInst *Ld1, MemInstList &VecMem);
298 bool ARMParallelDSP::AreSequentialLoads(LoadInst *Ld0, LoadInst *Ld1,
300   if (!Ld0 || !Ld1)
303   if (!LoadPairs.count(Ld0) || LoadPairs[Ld0] != Ld1)
308     dbgs() << "Ld1:"; Ld1->dump();
313   VecMem.push_back(Ld1);
562     auto Ld1 = static_cast<LoadInst*>(PMul1->LHS);
567     if (Ld0 == Ld2 || Ld1 == Ld3)
570     if (AreSequentialLoads(Ld0, Ld1, PMul0->VecLd)) {
581     } else if (AreSequentialLoads(Ld1, Ld0, PMul0->VecLd) &&
584       LLVM_DEBUG(dbgs() << "    exchanging Ld0 and Ld1\n");