Lines Matching defs:VPT

39 /// VPT, VCMP, VPNOT and VCTP won't overwrite VPR.P0 when they update it in a
40 /// "VPT Active" context (which includes low-overhead loops and vpt blocks).
44 /// if VPT active:    ; Between a DLSTP/LETP, or for predicated instrs
50 /// fall in the "VPT active" case, so we can consider that all VPR writes by
203       // VPT/VPST + 4 predicated instructions.
204       assert(Insts.size() <= 5 && "Too many instructions in VPT block!");
214   // represent a VPT block, which is a list of instructions that begins with a
215   // VPT/VPST and has a maximum of four proceeding instructions. All
227              && "Can't begin VPT without predicate");
231       // that MI is a VPT, CurrentPredicates will also just be MI.
241       LLVM_DEBUG(dbgs() << "ARM Loops: Adding VPT Predicate: " << *MI);
246       LLVM_DEBUG(dbgs() << "ARM Loops: Resetting VPT Predicate: " << *MI);
269     // If this block begins with a VPT, we can check whether it's using
274       MachineInstr *VPT = Insts.front();
275       assert(isVPTOpcode(VPT->getOpcode()) &&
276              "Expected VPT block to begin with VPT/VPST");
278       if (VPT->getOpcode() == ARM::MVE_VPST)
281       // If the VPT block does not define something that is an "output", then
284       if (isVPTOpcode(VPT->getOpcode()) &&
307           if (Def->getParent() == VPT->getParent())
314       return (IsOperandPredicated(VPT, 1) || IsOperandPredicated(VPT, 2)) &&
315              (IsOperandPredicated(VPT, 1) || IsOperandInvariant(VPT, 1)) &&
316              (IsOperandPredicated(VPT, 2) || IsOperandInvariant(VPT, 2));
333         // We don't know how to convert a block with just a VPT;VCTP into
336                "Expected VPT block to start with a VPST or VPT!");
398     // predication with it. Record VPT blocks and return whether the
616     LLVM_DEBUG(dbgs() << "ARM Loops: Invalid VPT state.\n");
918   // predicated and so the conversion from VPT predication to tail-predication
923   // A masked load, whether through VPT or tail predication, will write zeros
1032   // We've already validated that any VPT predication within the loop will be
1034   // any VPT predicated instruction is predicated upon VCTP. Any live-out
1213     //    instead a VPT block, which means we can assert while building up
1214     //    the VPT block because we don't find another VPT or VPST to being a new
1247   // VPT block.
1271     // Clear the existing predicate when we're not in VPT Active state,
1279   // Finally once the predicate has been modified, we can start a new VPT
1580       // Replace the VCMP with a VPT
1591       LLVM_DEBUG(dbgs() << "ARM Loops: Combining with VCMP to VPT: " << *MIB);
1608         // The VPT block has a non-uniform predicate but it uses a vpst and its
1637           // merged into a VPT so do that instead if the VCMP exists.
1668       // preceeding un-merged VCMP into a VPT. This VCMP comes from a VPT
1784       LLVM_DEBUG(dbgs() << "ARM Loops: Recomputing VPT/VPST Block Mask: " << *I);