Lines Matching defs:isThumb1

115     bool isThumb1, isThumb2;
489   assert(isThumb1 && "Can only update base register uses for Thumb1!");
637   bool SafeToClobberCPSR = !isThumb1 ||
641   bool Writeback = isThumb1; // Thumb1 LDM/STM have base reg writeback.
646   if (isThumb1 && ContainsReg(Regs, Base)) {
657   bool haveIBAndDA = isNotVFP && !isThumb2 && !isThumb1;
663   } else if (Offset == -4 * (int)NumRegs && isNotVFP && !isThumb1) {
697       NewBase = findFreeReg(isThumb1 ? ARM::tGPRRegClass : ARM::GPRRegClass);
704                            : (isThumb1 && Base == ARM::SP)
706                                  : (isThumb1 && Offset < 8)
708                                        : isThumb1 ? ARM::tADDi8 : ARM::ADDri;
716                          : (isThumb1 && Offset < 8 && Base != ARM::SP)
718                                : isThumb1 ? ARM::tSUBi8 : ARM::SUBri;
730     if (isThumb1) {
794   if (isThumb1 && !SafeToClobberCPSR && Writeback && !BaseKill)
800     assert(isThumb1 && "expected Writeback only inThumb1");
1289   if (isThumb1) return false;
1470   if (isThumb1) return false;
2037   if (isThumb1) return false;
2110   isThumb1 = AFI->isThumbFunction() && !isThumb2;
2117     if (isThumb1)