Lines Matching defs:BaseOp

1622   const MachineOperand &BaseOp = MI.getOperand(2);
1623   Register Base = BaseOp.getReg();
1653     MIB.add(Reg0Op).add(Reg1Op).addReg(BaseOp.getReg(), RegState::Define);
1656     MIB.addReg(BaseOp.getReg(), RegState::Define).add(Reg0Op).add(Reg1Op);
1658   MIB.addReg(BaseOp.getReg(), RegState::Kill)
1768   const MachineOperand &BaseOp = MI->getOperand(2);
1769   Register BaseReg = BaseOp.getReg();
1794   bool BaseKill = BaseOp.isKill();
1795   bool BaseUndef = BaseOp.isUndef();
3014   unsigned BaseOp = getBaseOperandIndex(*MI);
3015   MI->getOperand(BaseOp).setReg(NewBaseReg);
3020   const TargetRegisterClass *TRC = TII->getRegClass(MCID, BaseOp, TRI, *MF);
3023   int OldOffset = MI->getOperand(BaseOp + 1).getImm();
3025     MI->getOperand(BaseOp + 1).setImm(OldOffset - Offset);
3155     int BaseOp = getBaseOperandIndex(Use);
3156     if (BaseOp == -1)
3159     if (!Use.getOperand(BaseOp).isReg() ||
3160         Use.getOperand(BaseOp).getReg() != Base)
3164     else if (Use.getOperand(BaseOp + 1).getImm() == 0)
3206     // allowing us to update and subsequent uses of BaseOp reg with the
3213     int BaseOp = getBaseOperandIndex(*PrePostInc);
3214     IncrementOffset = PrePostInc->getOperand(BaseOp+1).getImm();
3234       unsigned BaseOp = getBaseOperandIndex(*Use);
3236                                           Use->getOperand(BaseOp + 1).getImm() -
3284       int BaseOp = getBaseOperandIndex(MI);
3285       if (BaseOp == -1 || !MI.getOperand(BaseOp).isReg())
3288       Register Base = MI.getOperand(BaseOp).getReg();