Lines Matching defs:BaseAccess
3142 MachineInstr *BaseAccess = nullptr;
3146 // Other accesses after BaseAccess that will need to be updated to use the
3165 BaseAccess = &Use;
3172 if (BaseAccess && Increment) {
3173 if (PrePostInc || BaseAccess->getParent() != Increment->getParent())
3183 // Make sure that Increment has no uses before BaseAccess that are not PHI
3187 if (&Use == BaseAccess || (Use.getOpcode() != TargetOpcode::PHI &&
3188 !DT->dominates(BaseAccess, &Use))) {
3189 LLVM_DEBUG(dbgs() << " BaseAccess doesn't dominate use of increment\n");
3197 BaseAccess->getOpcode(), IncrementOffset > 0 ? ARM_AM::add : ARM_AM::sub);
3204 // If we already have a pre/post index load/store then set BaseAccess,
3215 BaseAccess = PrePostInc;
3222 // other offsets after the BaseAccess. We rely on either
3223 // dominates(BaseAccess, OtherAccess) or dominates(OtherAccess, BaseAccess)
3232 if (DT->dominates(BaseAccess, Use)) {
3242 } else if (!DT->dominates(Use, BaseAccess)) {
3254 // Replace BaseAccess with a post inc
3255 LLVM_DEBUG(dbgs() << "Changing: "; BaseAccess->dump());
3259 createPostIncLoadStore(BaseAccess, IncrementOffset, NewBaseReg, TII, TRI);
3260 BaseAccess->eraseFromParent();