Lines Matching defs:SrcVT

6089   EVT SrcVT = Tmp1.getValueType();
6106     if (SrcVT == MVT::f32) {
6140   if (SrcVT == MVT::f64)
6303   EVT SrcVT = Op.getValueType();
6306   if ((SrcVT == MVT::i16 || SrcVT == MVT::i32) &&
6312       (SrcVT == MVT::f16 || SrcVT == MVT::bf16)) {
6317         MoveFromHPR(SDLoc(N), DAG, MVT::i32, SrcVT.getSimpleVT(), Op));
6320   if (!(SrcVT == MVT::i64 || DstVT == MVT::i64))
6324   if (SrcVT == MVT::i64 && TLI.isTypeLegal(DstVT)) {
6336   if (DstVT == MVT::i64 && TLI.isTypeLegal(SrcVT)) {
6338     if (DAG.getDataLayout().isBigEndian() && SrcVT.isVector() &&
6339         SrcVT.getVectorNumElements() > 1)
6342                         DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op));
8297     EVT SrcVT = Src.ShuffleVec.getValueType();
8299     uint64_t SrcVTSize = SrcVT.getFixedSizeInBits();
8306     EVT EltVT = SrcVT.getVectorElementType();
18623     EVT SrcVT = Src.getValueType();
18624     if (SrcVT.getScalarSizeInBits() == DstVT.getScalarSizeInBits())
18637   EVT SrcVT = Src.getValueType();
18641       SrcVT.getScalarSizeInBits() <= DstVT.getScalarSizeInBits() &&
19267 bool ARMTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const {
19268   if (SrcVT.isVector() || DstVT.isVector() || !SrcVT.isInteger() ||
19271   unsigned SrcBits = SrcVT.getSizeInBits();
20832     MVT SrcVT = (Sz == 16 ? MVT::f16 : MVT::f32);
20843       LC = RTLIB::getFPEXT(SrcVT, DstVT);
20858   EVT SrcVT = SrcVal.getValueType();
20861   const unsigned SrcSz = SrcVT.getSizeInBits();
20876   RTLIB::Libcall LC = RTLIB::getFPROUND(SrcVT, DstVT);
21165 bool ARMTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,