Lines Matching defs:isUpdating
206 void SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs,
214 void SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs,
221 void SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating,
299 void SelectVLDDup(SDNode *N, bool IsIntrinsic, bool isUpdating,
2106 void ARMDAGToDAGISel::SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs,
2115 bool IsIntrinsic = !isUpdating; // By coincidence, all supported updating
2159 if (isUpdating)
2174 if (isUpdating) {
2210 if (isUpdating) {
2243 if (isUpdating)
2248 void ARMDAGToDAGISel::SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs,
2257 bool IsIntrinsic = !isUpdating; // By coincidence, all supported updating
2260 unsigned Vec0Idx = 3; // AddrOpIdx + (isUpdating ? 2 : 1)
2294 if (isUpdating)
2333 if (isUpdating) {
2385 if (isUpdating) {
2402 void ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating,
2411 bool IsIntrinsic = !isUpdating; // By coincidence, all supported updating
2414 unsigned Vec0Idx = 3; // AddrOpIdx + (isUpdating ? 2 : 1)
2466 if (isUpdating)
2476 if (isUpdating) {
2526 if (isUpdating)
2945 bool isUpdating, unsigned NumVecs,
3004 if (isUpdating)
3017 if (isUpdating) {
3065 if (isUpdating)