Lines Matching defs:QOpcodes0

207                  const uint16_t *DOpcodes, const uint16_t *QOpcodes0,
215                  const uint16_t *DOpcodes, const uint16_t *QOpcodes0,
301                     const uint16_t *QOpcodes0 = nullptr,
2108                                 const uint16_t *QOpcodes0,
2171                     QOpcodes0[OpcodeIndex]);
2203     SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
2250                                 const uint16_t *QOpcodes0,
2330                     QOpcodes0[OpcodeIndex]);
2376   SDNode *VStA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
2947                                    const uint16_t *QOpcodes0,
3015                  : (NumVecs == 1) ? QOpcodes0[OpcodeIndex]
3036     SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, ResTy,
4357     static const uint16_t QOpcodes0[] = { ARM::VLD2DUPq8EvenPseudo,
4363     SelectVLDDup(N, /* IsIntrinsic= */ false, true, 2, DOpcodes, QOpcodes0, QOpcodes1);
4372     static const uint16_t QOpcodes0[] = { ARM::VLD3DUPq8EvenPseudo,
4378     SelectVLDDup(N, /* IsIntrinsic= */ false, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
4387     static const uint16_t QOpcodes0[] = { ARM::VLD4DUPq8EvenPseudo,
4393     SelectVLDDup(N, /* IsIntrinsic= */ false, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
4437     static const uint16_t QOpcodes0[] = { ARM::VLD3q8Pseudo_UPD,
4443     SelectVLD(N, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
4452       static const uint16_t QOpcodes0[] = {ARM::VLD4q8Pseudo_UPD,
4458       SelectVLD(N, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
4494       static const uint16_t QOpcodes0[] = {
4500       SelectVLD(N, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
4511       static const uint16_t QOpcodes0[] = {
4517       SelectVLD(N, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
4585     static const uint16_t QOpcodes0[] = { ARM::VST3q8Pseudo_UPD,
4591     SelectVST(N, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
4600       static const uint16_t QOpcodes0[] = {ARM::VST4q8Pseudo_UPD,
4606       SelectVST(N, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
4634       static const uint16_t QOpcodes0[] = { ARM::VST1q8LowTPseudo_UPD,
4642       SelectVST(N, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
4654       static const uint16_t QOpcodes0[] = { ARM::VST1q8LowQPseudo_UPD,
4662       SelectVST(N, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
4860       static const uint16_t QOpcodes0[] = { ARM::VLD1q8LowTPseudo_UPD,
4868       SelectVLD(N, false, 3, DOpcodes, QOpcodes0, QOpcodes1);
4877       static const uint16_t QOpcodes0[] = { ARM::VLD1q8LowQPseudo_UPD,
4885       SelectVLD(N, false, 4, DOpcodes, QOpcodes0, QOpcodes1);
4903       static const uint16_t QOpcodes0[] = { ARM::VLD3q8Pseudo_UPD,
4909       SelectVLD(N, false, 3, DOpcodes, QOpcodes0, QOpcodes1);
4918       static const uint16_t QOpcodes0[] = { ARM::VLD4q8Pseudo_UPD,
4924       SelectVLD(N, false, 4, DOpcodes, QOpcodes0, QOpcodes1);
4931       static const uint16_t QOpcodes0[] = { ARM::VLD2DUPq8EvenPseudo,
4938                    DOpcodes, QOpcodes0, QOpcodes1);
4947       static const uint16_t QOpcodes0[] = { ARM::VLD3DUPq8EvenPseudo,
4954                    DOpcodes, QOpcodes0, QOpcodes1);
4963       static const uint16_t QOpcodes0[] = { ARM::VLD4DUPq8EvenPseudo,
4970                    DOpcodes, QOpcodes0, QOpcodes1);
5029       static const uint16_t QOpcodes0[] = { ARM::VST1q8LowTPseudo_UPD,
5037       SelectVST(N, false, 3, DOpcodes, QOpcodes0, QOpcodes1);
5046       static const uint16_t QOpcodes0[] = { ARM::VST1q8LowQPseudo_UPD,
5054       SelectVST(N, false, 4, DOpcodes, QOpcodes0, QOpcodes1);
5072       static const uint16_t QOpcodes0[] = { ARM::VST3q8Pseudo_UPD,
5078       SelectVST(N, false, 3, DOpcodes, QOpcodes0, QOpcodes1);
5087       static const uint16_t QOpcodes0[] = { ARM::VST4q8Pseudo_UPD,
5093       SelectVST(N, false, 4, DOpcodes, QOpcodes0, QOpcodes1);