Lines Matching defs:RegInfo

188                        const ARMBaseRegisterInfo *RegInfo) {
216     dbgs() << "Don't know where to spill " << printReg(Reg, RegInfo) << "\n";
334   const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
346   return (RegInfo->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
436   const ARMBaseRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
500       unsigned Reg = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
514       unsigned Reg = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg());
533       unsigned Reg = RegInfo->getSEHRegNum(MO.getReg());
577       unsigned Reg = RegInfo->getSEHRegNum(MO.getReg());
608       unsigned Reg = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg());
614       unsigned Reg = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
896   const ARMBaseRegisterInfo *RegInfo = STI.getRegisterInfo();
916   Register FramePtr = RegInfo->getFrameRegister(MF);
959                                   AFI->getNumAlignedDPRCS2Regs(), RegInfo);
1287                            RegInfo)) {
1343   if (!AFI->getNumAlignedDPRCS2Regs() && RegInfo->hasStackRealignment(MF)) {
1375   if (RegInfo->hasBasePointer(MF)) {
1377       BuildMI(MBB, MBBI, dl, TII.get(ARM::MOVr), RegInfo->getBaseRegister())
1382       BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), RegInfo->getBaseRegister())
1398   const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
1417   Register FramePtr = RegInfo->getFrameRegister(MF);
1574   const ARMBaseRegisterInfo *RegInfo = static_cast<const ARMBaseRegisterInfo *>(
1590   if (RegInfo->hasStackRealignment(MF)) {
1593       FrameReg = RegInfo->getFrameRegister(MF);
1596       assert(RegInfo->hasBasePointer(MF) &&
1598       FrameReg = RegInfo->getBaseRegister();
1608     if (isFixed || (hasMovingSP && !RegInfo->hasBasePointer(MF))) {
1609       FrameReg = RegInfo->getFrameRegister(MF);
1612       assert(RegInfo->hasBasePointer(MF) && "missing base pointer!");
1618           FrameReg = RegInfo->getFrameRegister(MF);
1633         FrameReg = RegInfo->getFrameRegister(MF);
1638       FrameReg = RegInfo->getFrameRegister(MF);
1645   if (RegInfo->hasBasePointer(MF)) {
1646     FrameReg = RegInfo->getBaseRegister();
2114   const ARMBaseRegisterInfo *RegInfo = STI.getRegisterInfo();
2138                        RegInfo](unsigned Reg, SpillArea TestArea) {
2139     return getSpillArea(Reg, PushPopSplit, NumAlignedDPRCS2Regs, RegInfo) ==
2177   const ARMBaseRegisterInfo *RegInfo = STI.getRegisterInfo();
2195                        RegInfo](unsigned Reg, SpillArea TestArea) {
2196     return getSpillArea(Reg, PushPopSplit, NumAlignedDPRCS2Regs, RegInfo) ==
2430   const ARMBaseRegisterInfo *RegInfo = static_cast<const ARMBaseRegisterInfo *>(
2439   Register FramePtr = RegInfo->getFrameRegister(MF);
2449       (MFI.hasVarSizedObjects() || RegInfo->hasStackRealignment(MF)))
2474     if (MFI.hasVarSizedObjects() || RegInfo->hasStackRealignment(MF) ||
2483   if (RegInfo->hasBasePointer(MF))
2484     SavedRegs.set(RegInfo->getBaseRegister());
2496   const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF);
2629     if (RegInfo->hasBasePointer(MF))
2649   bool HasBPOrFixedSP = RegInfo->hasBasePointer(MF) || !HasMovingSP;
2668       !CanEliminateFrame || RegInfo->cannotEliminateFrame(MF)) {
3310         auto RegInfo = STI.getRegisterInfo();
3311         RegInfo->emitLoadConstPool(*McrMBB, MBBI, DL, ScratchReg0, 0,
3329       auto RegInfo = STI.getRegisterInfo();
3330       RegInfo->emitLoadConstPool(*McrMBB, MBBI, DL, ScratchReg0, 0,
3420         auto RegInfo = STI.getRegisterInfo();
3421         RegInfo->emitLoadConstPool(*AllocMBB, MBBI, DL, ScratchReg0, 0,
3433       auto RegInfo = STI.getRegisterInfo();
3434       RegInfo->emitLoadConstPool(*AllocMBB, MBBI, DL, ScratchReg0, 0,
3453         auto RegInfo = STI.getRegisterInfo();
3454         RegInfo->emitLoadConstPool(
3467       auto RegInfo = STI.getRegisterInfo();
3468       RegInfo->emitLoadConstPool(