Lines Matching defs:CPSR

231     bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR);
242 // default CCReg argument. Sets CPSR if we're setting CPSR instead of CCR.
243 bool ARMFastISel::DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR) {
247   // Look to see if our OptionalDef is defining CPSR or CCR.
250     if (MO.getReg() == ARM::CPSR)
251       *CPSR = true;
274 // CPSR defs that need to be added before the remaining operands. See s_cc_out
287   // defines CPSR. All other OptionalDefines in ARM are the CCR register.
288   bool CPSR = false;
289   if (DefinesOptionalPredicate(MI, &CPSR))
290     MIB.add(CPSR ? t1CondCodeOp() : condCodeOp());
1252       .addMBB(TBB).addImm(ARMPred).addReg(ARM::CPSR);
1275       .addMBB(TBB).addImm(CCMode).addReg(ARM::CPSR);
1313                   .addMBB(TBB).addImm(CCMode).addReg(ARM::CPSR);
1475   // ARMEmitCmp emits a FMSTAT when necessary, so it's always safe to use CPSR.
1478           .addImm(ARMPred).addReg(ARM::CPSR);
1662         .addReg(ARM::CPSR);
1670         .addReg(ARM::CPSR);
2701   // 16-bit Thumb instructions always set CPSR (unless they're in an IT block).
2713   // CPSR is set only by 16-bit Thumb instructions.
2729       MIB.addReg(ARM::CPSR, RegState::Define);