Lines Matching defs:Br
269 bool fixupImmediateBr(ImmBranch &Br);
270 bool fixupConditionalBr(ImmBranch &Br);
271 bool fixupUnconditionalBr(ImmBranch &Br);
1711 bool ARMConstantIslands::fixupImmediateBr(ImmBranch &Br) {
1712 MachineInstr *MI = Br.MI;
1716 if (BBUtils->isBBInRange(MI, DestBB, Br.MaxDisp))
1719 if (!Br.isCond)
1720 return fixupUnconditionalBr(Br);
1721 return fixupConditionalBr(Br);
1729 ARMConstantIslands::fixupUnconditionalBr(ImmBranch &Br) {
1730 MachineInstr *MI = Br.MI;
1739 Br.MaxDisp = (1 << 21) * 2;
1755 ARMConstantIslands::fixupConditionalBr(ImmBranch &Br) {
1756 MachineInstr *MI = Br.MI;
1780 BMI->getOpcode() == Br.UncondBr) {
1789 if (BBUtils->isBBInRange(MI, NewDest, Br.MaxDisp)) {
1826 Br.MI = &MBB->back();
1829 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr))
1833 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr)).addMBB(DestBB);
1835 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
1836 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
1900 auto TryShrinkBranch = [this](ImmBranch &Br) {
1901 unsigned Opcode = Br.MI->getOpcode();
1920 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB();
1921 if (BBUtils->isBBInRange(Br.MI, DestBB, MaxOffs)) {
1922 LLVM_DEBUG(dbgs() << "Shrink branch: " << *Br.MI);
1923 Br.MI->setDesc(TII->get(NewOpc));
1924 MachineBasicBlock *MBB = Br.MI->getParent();
1939 auto FindCmpForCBZ = [this](ImmBranch &Br, ImmCompare &ImmCmp,
1946 if (!Br.MI->killsRegister(ARM::CPSR, /*TRI=*/nullptr))
1951 ARMCC::CondCodes Pred = getInstrPredicate(*Br.MI, PredReg);
1961 unsigned BrOffset = BBUtils->getOffsetOf(Br.MI) + 4 - 2;
1969 MachineInstr *CmpMI = findCMPToFoldIntoCBZ(Br.MI, TRI);
1978 auto TryConvertToLE = [this](ImmBranch &Br, ImmCompare &Cmp) {
1979 if (Br.MI->getOpcode() != ARM::t2Bcc || !STI->hasLOB() ||
1983 MachineBasicBlock *MBB = Br.MI->getParent();
1984 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB();
1986 !BBUtils->isBBInRange(Br.MI, DestBB, 4094))
1993 // target of Br. So now we need to reverse the condition.
1996 MachineInstrBuilder MIB = BuildMI(*MBB, Br.MI, Br.MI->getDebugLoc(),
1999 MIB.add(Br.MI->getOperand(0));
2000 Br.MI->eraseFromParent();
2001 Br.MI = MIB;
2013 for (ImmBranch &Br : reverse(ImmBranches)) {
2014 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB();
2015 MachineBasicBlock *MBB = Br.MI->getParent();
2016 MachineBasicBlock *ExitBB = &MBB->back() == Br.MI ?
2021 if (FindCmpForCBZ(Br, Cmp, ExitBB) && TryConvertToLE(Br, Cmp)) {
2025 FindCmpForCBZ(Br, Cmp, DestBB);
2026 MadeChange |= TryShrinkBranch(Br);
2029 unsigned Opcode = Br.MI->getOpcode();
2038 MachineBasicBlock::iterator KillMI = Br.MI;
2050 LLVM_DEBUG(dbgs() << "Fold: " << *Cmp.MI << " and: " << *Br.MI);
2052 BuildMI(*MBB, Br.MI, Br.MI->getDebugLoc(), TII->get(Cmp.NewOpc))
2055 .addMBB(DestBB, Br.MI->getOperand(0).getTargetFlags());
2059 if (Br.MI->getOpcode() == ARM::tBcc) {
2060 Br.MI->eraseFromParent();
2061 Br.MI = NewBR;