Lines Matching defs:State
22 CCState &State, bool CanFail) {
26 if (MCRegister Reg = State.AllocateReg(RegList))
27 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
34 State.addLoc(CCValAssign::getCustomMem(
35 ValNo, ValVT, State.AllocateStack(8, Align(4)), LocVT, LocInfo));
40 if (MCRegister Reg = State.AllocateReg(RegList))
41 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
43 State.addLoc(CCValAssign::getCustomMem(
44 ValNo, ValVT, State.AllocateStack(4, Align(4)), LocVT, LocInfo));
51 CCState &State) {
52 if (!f64AssignAPCS(ValNo, ValVT, LocVT, LocInfo, State, true))
55 !f64AssignAPCS(ValNo, ValVT, LocVT, LocInfo, State, false))
63 CCState &State, bool CanFail) {
69 MCRegister Reg = State.AllocateReg(HiRegList, ShadowRegList);
73 Reg = State.AllocateReg(GPRArgRegs);
81 State.addLoc(CCValAssign::getCustomMem(
82 ValNo, ValVT, State.AllocateStack(8, Align(8)), LocVT, LocInfo));
91 MCRegister T = State.AllocateReg(LoRegList[i]);
95 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
96 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i],
104 CCState &State) {
105 if (!f64AssignAAPCS(ValNo, ValVT, LocVT, LocInfo, State, true))
108 !f64AssignAAPCS(ValNo, ValVT, LocVT, LocInfo, State, false))
114 CCValAssign::LocInfo LocInfo, CCState &State) {
118 MCRegister Reg = State.AllocateReg(HiRegList, LoRegList);
127 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
128 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i],
136 CCState &State) {
137 if (!f64RetAssign(ValNo, ValVT, LocVT, LocInfo, State))
139 if (LocVT == MVT::v2f64 && !f64RetAssign(ValNo, ValVT, LocVT, LocInfo, State))
147 CCState &State) {
149 State);
172 CCState &State) {
173 SmallVectorImpl<CCValAssign> &PendingMembers = State.getPendingLocs();
191 auto &DL = State.getMachineFunction().getDataLayout();
201 unsigned RegIdx = State.getFirstUnallocated(RegList);
207 State.AllocateReg(RegList[RegIdx++]);
232 State.AllocateRegBlock(RegList, PendingMembers.size());
236 State.addLoc(PendingMember);
244 if (LocVT == MVT::i32 && State.getStackSize() == 0) {
247 unsigned RegIdx = State.getFirstUnallocated(RegList);
250 It.convertToMem(State.AllocateStack(Size, Align(Size)));
252 It.convertToReg(State.AllocateReg(RegList[RegIdx++]));
254 State.addLoc(It);
265 State.AllocateReg(Reg);
268 if (State.getMachineFunction().getSubtarget<ARMSubtarget>().isTargetAEABI())
275 It.convertToMem(State.AllocateStack(Size, Alignment));
276 State.addLoc(It);
288 CCValAssign::LocInfo LocInfo, CCState &State,
290 MCRegister Reg = State.AllocateReg(RegList);
292 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
300 ISD::ArgFlagsTy ArgFlags, CCState &State) {
302 return CustomAssignInRegList(ValNo, ValVT, MVT::i32, LocInfo, State,
309 CCState &State) {
311 return CustomAssignInRegList(ValNo, ValVT, MVT::f32, LocInfo, State,