Lines Matching defs:MIRBuilder

97   ARMOutgoingValueHandler(MachineIRBuilder &MIRBuilder,
99       : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB) {}
109     auto SPReg = MIRBuilder.buildCopy(p0, Register(ARM::SP));
111     auto OffsetReg = MIRBuilder.buildConstant(s32, Offset);
113     auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg);
115     MPO = MachinePointerInfo::getStack(MIRBuilder.getMF(), Offset);
128     MIRBuilder.buildCopy(PhysReg, ExtReg);
136     auto MMO = MIRBuilder.getMF().getMachineMemOperand(
138     MIRBuilder.buildStore(ExtReg, Addr, *MMO);
165     MIRBuilder.buildUnmerge(NewRegs, Arg.Regs[0]);
167     bool IsLittle = MIRBuilder.getMF().getSubtarget<ARMSubtarget>().isLittle();
189 /// \p MIRBuilder's insertion point is correct.
190 bool ARMCallLowering::lowerReturnVal(MachineIRBuilder &MIRBuilder,
197   auto &MF = MIRBuilder.getMF();
215   ARMOutgoingValueHandler RetHandler(MIRBuilder, MF.getRegInfo(), Ret);
217                                        MIRBuilder, F.getCallingConv(),
221 bool ARMCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
226   auto const &ST = MIRBuilder.getMF().getSubtarget<ARMSubtarget>();
228   auto Ret = MIRBuilder.buildInstrNoInsert(Opcode).add(predOps(ARMCC::AL));
230   if (!lowerReturnVal(MIRBuilder, Val, VRegs, Ret))
233   MIRBuilder.insertInstr(Ret);
242   ARMIncomingValueHandler(MachineIRBuilder &MIRBuilder,
244       : IncomingValueHandler(MIRBuilder, MRI) {}
252     auto &MFI = MIRBuilder.getMF().getFrameInfo();
259     MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI);
261     return MIRBuilder.buildFrameIndex(LLT::pointer(MPO.getAddrSpace(), 32), FI)
276       MIRBuilder.buildTrunc(ValVReg, LoadVReg);
285     MachineFunction &MF = MIRBuilder.getMF();
289     return MIRBuilder.buildLoad(Res, Addr, *MMO);
305       MIRBuilder.buildCopy(ValVReg, PhysReg);
312       auto PhysRegToVReg = MIRBuilder.buildCopy(LLT::scalar(LocSize), PhysReg);
313       MIRBuilder.buildTrunc(ValVReg, PhysRegToVReg);
345     bool IsLittle = MIRBuilder.getMF().getSubtarget<ARMSubtarget>().isLittle();
349     MIRBuilder.buildMergeLikeInstr(Arg.Regs[0], NewRegs);
361   FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
362       : ARMIncomingValueHandler(MIRBuilder, MRI) {}
365     MIRBuilder.getMRI()->addLiveIn(PhysReg);
366     MIRBuilder.getMBB().addLiveIn(PhysReg);
372 bool ARMCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
389   auto &MF = MIRBuilder.getMF();
390   auto &MBB = MIRBuilder.getMBB();
404   FormalArgHandler ArgHandler(MIRBuilder, MIRBuilder.getMF().getRegInfo());
418     MIRBuilder.setInstr(*MBB.begin());
421                                      MIRBuilder, F.getCallingConv(),
426   MIRBuilder.setMBB(MBB);
433   CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
435       : ARMIncomingValueHandler(MIRBuilder, MRI), MIB(MIB) {}
463 bool ARMCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const {
464   MachineFunction &MF = MIRBuilder.getMF();
477   auto CallSeqStart = MIRBuilder.buildInstr(ARM::ADJCALLSTACKDOWN);
483   auto MIB = MIRBuilder.buildInstrNoInsert(CallOpcode);
515   ARMOutgoingValueHandler ArgHandler(MIRBuilder, MRI, MIB);
517                                      MIRBuilder, Info.CallConv, Info.IsVarArg))
521   MIRBuilder.insertInstr(MIB);
531     CallReturnHandler RetHandler(MIRBuilder, MRI, MIB);
533                                        MIRBuilder, Info.CallConv,
542   MIRBuilder.buildInstr(ARM::ADJCALLSTACKUP)