Lines Matching defs:Val

60     auto *Val = mdconst::dyn_extract<ConstantInt>(Tuple->getOperand(I + 1));
61     if (!Key || !Val)
63     setRegister(Key->getZExtValue(), Val->getZExtValue());
137 void AMDGPUPALMetadata::setRsrc1(CallingConv::ID CC, unsigned Val) {
138   setRegister(getRsrc1Reg(CC), Val);
141 void AMDGPUPALMetadata::setRsrc1(CallingConv::ID CC, const MCExpr *Val,
143   setRegister(getRsrc1Reg(CC), Val, Ctx);
148 void AMDGPUPALMetadata::setRsrc2(CallingConv::ID CC, unsigned Val) {
149   setRegister(getRsrc1Reg(CC) + 1, Val);
152 void AMDGPUPALMetadata::setRsrc2(CallingConv::ID CC, const MCExpr *Val,
154   setRegister(getRsrc1Reg(CC) + 1, Val, Ctx);
159 void AMDGPUPALMetadata::setSpiPsInputEna(unsigned Val) {
160   setRegister(PALMD::R_A1B3_SPI_PS_INPUT_ENA, Val);
165 void AMDGPUPALMetadata::setSpiPsInputAddr(unsigned Val) {
166   setRegister(PALMD::R_A1B4_SPI_PS_INPUT_ADDR, Val);
183 void AMDGPUPALMetadata::setRegister(unsigned Reg, unsigned Val) {
192     Val |= N.getUInt();
193   N = N.getDocument()->getNode(Val);
198 void AMDGPUPALMetadata::setRegister(unsigned Reg, const MCExpr *Val,
210     Val = MCBinaryExpr::createOr(Val, ExprIt->getSecond(), Ctx);
216       Val = MCBinaryExpr::createOr(Val, NExpr, Ctx);
220     Val = MCBinaryExpr::createOr(Val, NExpr, Ctx);
226   REM[Reg] = Val;
227   DelayedExprs.assignDocNode(N, msgpack::Type::UInt, Val);
243 void AMDGPUPALMetadata::setNumUsedVgprs(CallingConv::ID CC, unsigned Val) {
249     setRegister(NumUsedVgprsKey, Val);
253   getHwStage(CC)[".vgpr_count"] = MsgPackDoc.getNode(Val);
256 void AMDGPUPALMetadata::setNumUsedVgprs(CallingConv::ID CC, const MCExpr *Val,
263     setRegister(NumUsedVgprsKey, Val, Ctx);
267   setHwStage(CC, ".vgpr_count", msgpack::Type::UInt, Val);
271 void AMDGPUPALMetadata::setNumUsedAgprs(CallingConv::ID CC, unsigned Val) {
272   getHwStage(CC)[".agpr_count"] = Val;
275 void AMDGPUPALMetadata::setNumUsedAgprs(unsigned CC, const MCExpr *Val) {
276   setHwStage(CC, ".agpr_count", msgpack::Type::UInt, Val);
282 void AMDGPUPALMetadata::setNumUsedSgprs(CallingConv::ID CC, unsigned Val) {
288     setRegister(NumUsedSgprsKey, Val);
292   getHwStage(CC)[".sgpr_count"] = MsgPackDoc.getNode(Val);
295 void AMDGPUPALMetadata::setNumUsedSgprs(unsigned CC, const MCExpr *Val,
302     setRegister(NumUsedSgprsKey, Val, Ctx);
306   setHwStage(CC, ".sgpr_count", msgpack::Type::UInt, Val);
310 void AMDGPUPALMetadata::setScratchSize(CallingConv::ID CC, unsigned Val) {
313     setRegister(getScratchSizeKey(CC), Val);
317   getHwStage(CC)[".scratch_memory_size"] = MsgPackDoc.getNode(Val);
320 void AMDGPUPALMetadata::setScratchSize(unsigned CC, const MCExpr *Val,
324     setRegister(getScratchSizeKey(CC), Val, Ctx);
328   setHwStage(CC, ".scratch_memory_size", msgpack::Type::UInt, Val);
332 void AMDGPUPALMetadata::setFunctionScratchSize(StringRef FnName, unsigned Val) {
334   Node[".stack_frame_size_in_bytes"] = MsgPackDoc.getNode(Val);
335   Node[".backend_stack_size"] = MsgPackDoc.getNode(Val);
339 void AMDGPUPALMetadata::setFunctionLdsSize(StringRef FnName, unsigned Val) {
341   Node[".lds_size"] = MsgPackDoc.getNode(Val);
346                                                 unsigned Val) {
348   Node[".vgpr_count"] = MsgPackDoc.getNode(Val);
352                                                 const MCExpr *Val) {
354   DelayedExprs.assignDocNode(Node[".vgpr_count"], msgpack::Type::UInt, Val);
359                                                 unsigned Val) {
361   Node[".sgpr_count"] = MsgPackDoc.getNode(Val);
365                                                 const MCExpr *Val) {
367   DelayedExprs.assignDocNode(Node[".sgpr_count"], msgpack::Type::UInt, Val);
778       unsigned Val = I->second.getUInt();
779       Stream << "0x" << Twine::utohexstr(Reg) << ",0x" << Twine::utohexstr(Val);
859       uint64_t Val;
860       if (S.consumeInteger(0, Val)) {
865       Key = MsgPackDoc.getNode(uint64_t(Val));
1046 void AMDGPUPALMetadata::setHwStage(unsigned CC, StringRef field, unsigned Val) {
1047   getHwStage(CC)[field] = Val;
1050 void AMDGPUPALMetadata::setHwStage(unsigned CC, StringRef field, bool Val) {
1051   getHwStage(CC)[field] = Val;
1055                                    msgpack::Type Type, const MCExpr *Val) {
1056   DelayedExprs.assignDocNode(getHwStage(CC)[field], Type, Val);
1059 void AMDGPUPALMetadata::setComputeRegisters(StringRef field, unsigned Val) {
1060   getComputeRegisters()[field] = Val;
1063 void AMDGPUPALMetadata::setComputeRegisters(StringRef field, bool Val) {
1064   getComputeRegisters()[field] = Val;
1073 bool AMDGPUPALMetadata::checkComputeRegisters(StringRef field, unsigned Val) {
1075     return N->getUInt() == Val;
1079 bool AMDGPUPALMetadata::checkComputeRegisters(StringRef field, bool Val) {
1081     return N->getBool() == Val;
1085 void AMDGPUPALMetadata::setGraphicsRegisters(StringRef field, unsigned Val) {
1086   getGraphicsRegisters()[field] = Val;
1089 void AMDGPUPALMetadata::setGraphicsRegisters(StringRef field, bool Val) {
1090   getGraphicsRegisters()[field] = Val;
1094                                              unsigned Val) {
1095   getGraphicsRegisters()[field1].getMap(true)[field2] = Val;
1099                                              bool Val) {
1100   getGraphicsRegisters()[field1].getMap(true)[field2] = Val;