Lines Matching defs:OpDesc

705 ComponentProps::ComponentProps(const MCInstrDesc &OpDesc) {
706   assert(OpDesc.getNumDefs() == Component::DST_NUM);
708   assert(OpDesc.getOperandConstraint(Component::SRC0, MCOI::TIED_TO) == -1);
709   assert(OpDesc.getOperandConstraint(Component::SRC1, MCOI::TIED_TO) == -1);
710   auto TiedIdx = OpDesc.getOperandConstraint(Component::SRC2, MCOI::TIED_TO);
714   SrcOperandsNum = OpDesc.getNumOperands() - OpDesc.getNumDefs();
717   auto OperandsNum = OpDesc.getNumOperands();
720     if (OpDesc.operands()[CompOprIdx].OperandType == AMDGPU::OPERAND_KIMM32) {
3005 bool hasAny64BitVGPROperands(const MCInstrDesc &OpDesc) {
3008     int Idx = getNamedOperandIdx(OpDesc.getOpcode(), OpName);
3012     if (OpDesc.operands()[Idx].RegClass == AMDGPU::VReg_64RegClassID ||
3013         OpDesc.operands()[Idx].RegClass == AMDGPU::VReg_64_Align2RegClassID)
3020 bool isDPALU_DPP(const MCInstrDesc &OpDesc) {
3021   return hasAny64BitVGPROperands(OpDesc);