Lines Matching refs:MachineFunction

77   MCRegister getAlignedHighSGPRForRC(const MachineFunction &MF,
83   MCRegister reservedPrivateSegmentBufferReg(const MachineFunction &MF) const;
88   getMaxNumVectorRegs(const MachineFunction &MF) const;
90   BitVector getReservedRegs(const MachineFunction &MF) const override;
91   bool isAsmClobberable(const MachineFunction &MF,
94   const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
95   const MCPhysReg *getCalleeSavedRegsViaCopy(const MachineFunction *MF) const;
96   const uint32_t *getCallPreservedMask(const MachineFunction &MF,
113                             const MachineFunction &MF) const override;
115   Register getFrameRegister(const MachineFunction &MF) const override;
117   bool hasBasePointer(const MachineFunction &MF) const;
120   bool shouldRealignStack(const MachineFunction &MF) const override;
121   bool requiresRegisterScavenging(const MachineFunction &Fn) const override;
123   bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
125     const MachineFunction &MF) const override;
126   bool requiresVirtualBaseRegisters(const MachineFunction &Fn) const override;
145     const MachineFunction &MF, unsigned Kind = 0) const override;
294                                 const MachineFunction &MF,
332                                MachineFunction &MF) const override;
334   unsigned getRegPressureSetLimit(const MachineFunction &MF,
339   MCRegister getReturnAddressReg(const MachineFunction &MF) const;
420   ArrayRef<MCPhysReg> getAllSGPR128(const MachineFunction &MF) const;
424   ArrayRef<MCPhysReg> getAllSGPR64(const MachineFunction &MF) const;
428   ArrayRef<MCPhysReg> getAllSGPR32(const MachineFunction &MF) const;
472   getVRegFlagsOfReg(Register Reg, const MachineFunction &MF) const override;