Lines Matching defs:MBB
112 bool removeMBBifRedundant(MachineBasicBlock &MBB);
120 skipIgnoreExecInstsTrivialSucc(MachineBasicBlock &MBB,
125 skipToUncondBrOrEnd(MachineBasicBlock &MBB,
130 MachineBasicBlock::iterator End = MBB.end();
191 MachineBasicBlock *MBB = Worklist.pop_back_val();
193 if (MBB == End || !Visited.insert(MBB).second)
195 if (KillBlocks.contains(MBB))
198 Worklist.append(MBB->succ_begin(), MBB->succ_end());
217 MachineBasicBlock &MBB = *MI.getParent();
244 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), CopyReg)
252 BuildMI(MBB, I, DL, TII->get(AndOpc), Tmp)
263 BuildMI(MBB, I, DL, TII->get(XorOpc), SaveExecReg)
272 BuildMI(MBB, I, DL, TII->get(MovTermOpc), Exec)
279 I = skipToUncondBrOrEnd(MBB, I);
283 MachineInstr *NewBr = BuildMI(MBB, I, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ))
315 MachineBasicBlock &MBB = *MI.getParent();
321 MachineBasicBlock::iterator Start = MBB.begin();
327 BuildMI(MBB, Start, DL, TII->get(OrSaveExecOpc), SaveReg)
338 MachineInstr *And = BuildMI(MBB, ElsePt, DL, TII->get(AndOpc), DstReg)
343 BuildMI(MBB, ElsePt, DL, TII->get(XorTermrOpc), Exec)
349 ElsePt = skipToUncondBrOrEnd(MBB, ElsePt);
352 BuildMI(MBB, ElsePt, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ))
378 MachineBasicBlock &MBB = *MI.getParent();
400 And = BuildMI(MBB, &MI, DL, TII->get(AndOpc), AndReg)
405 Or = BuildMI(MBB, &MI, DL, TII->get(OrOpc), Dst)
409 Or = BuildMI(MBB, &MI, DL, TII->get(OrOpc), Dst)
432 MachineBasicBlock &MBB = *MI.getParent();
436 BuildMI(MBB, &MI, DL, TII->get(Andn2TermOpc), Exec)
442 auto BranchPt = skipToUncondBrOrEnd(MBB, MI.getIterator());
444 BuildMI(MBB, BranchPt, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))
458 MachineBasicBlock &MBB, MachineBasicBlock::iterator It) const {
461 MachineBasicBlock *B = &MBB;
464 return MBB.end();
476 return MBB.end();
487 MachineBasicBlock &MBB = *MI.getParent();
490 MachineBasicBlock::iterator InsPt = MBB.begin();
506 MachineBasicBlock *SplitBB = &MBB;
508 SplitBB = MBB.splitAt(MI, /*UpdateLiveIns*/true, LIS);
509 if (MDT && SplitBB != &MBB) {
510 MachineDomTreeNode *MBBNode = (*MDT)[&MBB];
513 MachineDomTreeNode *SplitBBNode = MDT->addNewBlock(SplitBB, &MBB);
522 BuildMI(MBB, InsPt, DL, TII->get(Opcode), Exec)
528 if (SplitBB != &MBB) {
535 for (MachineBasicBlock *BlockPiece : {&MBB, SplitBB}) {
548 if (VI.AliveBlocks.test(MBB.getNumber()))
553 VI.AliveBlocks.set(MBB.getNumber());
634 MachineBasicBlock &MBB = *MI->getParent();
636 skipIgnoreExecInstsTrivialSucc(MBB, std::next(MI->getIterator()));
637 if (Next == MBB.end() || !LoweredEndCf.count(&*Next))
656 removeMBBifRedundant(MBB);
662 MachineBasicBlock &MBB = *MI.getParent();
664 MachineInstr *Prev = (I != MBB.begin()) ? &*(std::prev(I)) : nullptr;
666 MachineBasicBlock *SplitBB = &MBB;
699 for (I = Prev ? Prev->getIterator() : MBB.begin(); I != MBB.end(); I = Next) {
711 I = MBB.end();
719 bool SILowerControlFlow::removeMBBifRedundant(MachineBasicBlock &MBB) {
720 for (auto &I : MBB.instrs()) {
725 assert(MBB.succ_size() == 1 && "MBB has more than one successor");
727 MachineBasicBlock *Succ = *MBB.succ_begin();
730 while (!MBB.predecessors().empty()) {
731 MachineBasicBlock *P = *MBB.pred_begin();
732 if (P->getFallThrough(false) == &MBB)
734 P->ReplaceUsesOfBlockWith(&MBB, Succ);
736 MBB.removeSuccessor(Succ);
738 for (auto &I : MBB.instrs())
742 // If Succ, the single successor of MBB, is dominated by MBB, MDT needs
743 // updating by changing Succ's idom to the one of MBB; otherwise, MBB must
745 if (MDT->dominates(&MBB, Succ))
747 MDT->getNode(&MBB)->getIDom());
748 MDT->eraseNode(&MBB);
750 MBB.clear();
751 MBB.eraseFromParent();
800 for (auto &MBB : MF) {
802 for (auto &Term : MBB.terminators()) {
804 KillBlocks.insert(&MBB);
810 for (auto &MI : MBB) {
812 KillBlocks.insert(&MBB);
824 MachineBasicBlock *MBB = &*BI;
827 E = MBB->end();
828 for (I = MBB->begin(); I != E; I = Next) {
831 MachineBasicBlock *SplitMBB = MBB;
845 if (SplitMBB != MBB) {
846 MBB = Next->getParent();
847 E = MBB->end();