Lines Matching defs:dmask

1261           // IR type. Check the dmask for the real number of elements loaded.
8199       // Work out the num dwords based on the dmask popcount and underlying type
8209       // Confirm that the return type is large enough for the dmask specified
8363       // Expecting to get an error flag since TFC is on - and dmask is 0
8364       // Force dmask to be at least 1 otherwise the instruction will fail
15313       AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::dmask) - 1;
15378   // Don't allow 0 dmask, as hardware assumes one channel enabled.
15385     // If the original dmask has one channel - then nothing to do
15388     // Use an arbitrary dmask - required for the instruction to work
15545       AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::dmask)) {
15645     MachineOperand *MO_Dmask = TII->getNamedOperand(MI, AMDGPU::OpName::dmask);
15647     // check that dmask operand is found.
15648     assert(MO_Dmask && "Expected dmask operand in instruction");
15650     unsigned dmask = MO_Dmask->getImm();
15653     unsigned ActiveLanes = TII->isGather4(MI) ? 4 : llvm::popcount(dmask);