Lines Matching defs:RMW

16589 static bool atomicIgnoresDenormalModeOrFPModeIsFTZ(const AtomicRMWInst *RMW) {
16590   if (RMW->hasMetadata("amdgpu.ignore.denormal.mode"))
16593   const fltSemantics &Flt = RMW->getType()->getScalarType()->getFltSemantics();
16594   auto DenormMode = RMW->getFunction()->getDenormalMode(Flt);
16599   return RMW->getFunction()
16604 static OptimizationRemark emitAtomicRMWLegalRemark(const AtomicRMWInst *RMW) {
16605   LLVMContext &Ctx = RMW->getContext();
16606   StringRef SS = Ctx.getSyncScopeName(RMW->getSyncScopeID()).value_or("");
16609   return OptimizationRemark(DEBUG_TYPE, "Passed", RMW)
16611          << RMW->getOperationName(RMW->getOperation())
16646 static bool isAtomicRMWLegalXChgTy(const AtomicRMWInst *RMW) {
16647   Type *Ty = RMW->getType();
16652     const DataLayout &DL = RMW->getFunction()->getParent()->getDataLayout();
16668 /// \returns true if it's valid to emit a native instruction for \p RMW, based
16671                                         const AtomicRMWInst *RMW,
16681         RMW->hasMetadata("amdgpu.no.remote.memory"))
16686   return RMW->hasMetadata("amdgpu.no.fine.grained.memory");
16691 atomicSupportedIfLegalIntType(const AtomicRMWInst *RMW) {
16692   return isAtomicRMWLegalIntTy(RMW->getType())
16719 SITargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *RMW) const {
16720   unsigned AS = RMW->getPointerAddressSpace();
16729   const DataLayout &DL = RMW->getFunction()->getDataLayout();
16731       DL.getTypeSizeInBits(RMW->getType()) == 64 &&
16732       flatInstrMayAccessPrivate(RMW))
16736     OptimizationRemarkEmitter ORE(RMW->getFunction());
16738       return emitAtomicRMWLegalRemark(RMW) << " due to an unsafe request.";
16743   auto SSID = RMW->getSyncScopeID();
16746       SSID == RMW->getContext().getOrInsertSyncScopeID("one-as");
16748   auto Op = RMW->getOperation();
16752     return isAtomicRMWLegalXChgTy(RMW)
16760     return atomicSupportedIfLegalIntType(RMW);
16767       if (Constant *ConstVal = dyn_cast<Constant>(RMW->getValOperand());
16772     return atomicSupportedIfLegalIntType(RMW);
16775     Type *Ty = RMW->getType();
16816         !atomicIgnoresDenormalModeOrFPModeIsFTZ(RMW))
16821     if (globalMemoryFPAtomicIsLegal(*Subtarget, RMW, HasSystemScope)) {
16853           if (RMW->use_empty() && Subtarget->hasAtomicFaddNoRtnInsts())
16856           if (!RMW->use_empty() && Subtarget->hasAtomicFaddRtnInsts())
16860           if (RMW->use_empty() &&
16879           if (RMW->use_empty() && Subtarget->hasAtomicFaddNoRtnInsts())
16881           if (!RMW->use_empty() && Subtarget->hasAtomicFaddRtnInsts())
16891     Type *Ty = RMW->getType();
16899     if (globalMemoryFPAtomicIsLegal(*Subtarget, RMW, HasSystemScope)) {
16935     return atomicSupportedIfLegalIntType(RMW);
17216   auto *RMW = dyn_cast<AtomicRMWInst>(AI);
17217   const unsigned PtrOpIdx = RMW ? AtomicRMWInst::getPointerOperandIndex()
17226   if (RMW)
17227     Alignment = RMW->getAlign();
17240   bool FullFlatEmulation = RMW && RMW->getOperation() == AtomicRMWInst::FAdd &&
17242                            RMW->getType()->isFloatTy();
17296   if (RMW) {
17298         RMW->getType(), CastToPrivate, RMW->getAlign(), "loaded.private");
17300     Value *NewVal = buildAtomicRMWValue(RMW->getOperation(), Builder,
17301                                         LoadedPrivate, RMW->getValOperand());
17303     Builder.CreateAlignedStore(NewVal, CastToPrivate, RMW->getAlign());