Lines Matching defs:PhiReg

4554                        unsigned InitReg, unsigned ResultReg, unsigned PhiReg,
4569   BuildMI(LoopBB, I, DL, TII->get(TargetOpcode::PHI), PhiReg)
4649                unsigned InitResultReg, unsigned PhiReg, int Offset,
4678                                       InitResultReg, DstReg, PhiReg, TmpExec,
4810   Register PhiReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
4816   auto InsPt = loadM0FromVGPR(TII, MBB, MI, InitReg, PhiReg, Offset,
4914   Register PhiReg = MRI.createVirtualRegister(VecRC);
4917   auto InsPt = loadM0FromVGPR(TII, MBB, MI, SrcVec->getReg(), PhiReg, Offset,
4926         .addReg(PhiReg)
4934         .addReg(PhiReg)