Lines Matching defs:MemVT
1718 bool SITargetLowering::canMergeStoresTo(unsigned AS, EVT MemVT,
1721 return (MemVT.getSizeInBits() <= 4 * 32);
1724 return (MemVT.getSizeInBits() <= MaxPrivateBits);
1727 return (MemVT.getSizeInBits() <= 2 * 32);
2031 SDValue SITargetLowering::convertArgType(SelectionDAG &DAG, EVT VT, EVT MemVT,
2037 VT.getVectorNumElements() != MemVT.getVectorNumElements()) {
2039 EVT::getVectorVT(*DAG.getContext(), MemVT.getVectorElementType(),
2046 if (Arg && (Arg->Flags.isSExt() || Arg->Flags.isZExt()) && VT.bitsLT(MemVT)) {
2048 Val = DAG.getNode(Opc, SL, MemVT, Val, DAG.getValueType(VT));
2051 if (MemVT.isFloatingPoint())
2062 SelectionDAG &DAG, EVT VT, EVT MemVT, const SDLoc &SL, SDValue Chain,
2070 if (MemVT.getStoreSize() < 4 && Alignment < 4) {
2075 EVT IntVT = MemVT.changeTypeToInteger();
2088 ArgVal = DAG.getNode(ISD::BITCAST, SL, MemVT, ArgVal);
2089 ArgVal = convertArgType(DAG, VT, MemVT, SL, ArgVal, Signed, Arg);
2095 SDValue Load = DAG.getLoad(MemVT, SL, Chain, Ptr, PtrInfo, Alignment,
2099 SDValue Val = convertArgType(DAG, VT, MemVT, SL, Load, Signed, Arg);
2125 // For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT)
2127 MVT MemVT = VA.getValVT();
2133 MemVT = VA.getLocVT();
2148 MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FI), MemVT);
2949 EVT MemVT = VA.getLocVT();
2971 if (MemVT.getStoreSize() < 4 && Alignment < 4) {
2975 EVT IntVT = MemVT.changeTypeToInteger();
2991 ArgVal = DAG.getNode(ISD::BITCAST, DL, MemVT, ArgVal);
2992 NewArg = convertArgType(DAG, VT, MemVT, DL, ArgVal,
3033 // MemVT and just do a bitcast. If MemVT is less than 32-bits we add a
3035 // MemVT may be smaller.
3037 EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits());
3038 if (MemVT.bitsLT(NewArg.getSimpleValueType()))
3041 NewArg = DAG.getBitcast(MemVT, NewArg);
3042 NewArg = convertArgType(DAG, VT, MemVT, DL, NewArg,
3062 lowerKernargMemParameter(DAG, VT, MemVT, DL, Chain, Offset,
9054 EVT MemVT = VData.getValueType();
9055 return DAG.getMemIntrinsicNode(NewOpcode, DL, Op->getVTList(), Ops, MemVT,
9082 EVT MemVT = VData.getValueType();
9083 return DAG.getMemIntrinsicNode(NewOpcode, DL, Op->getVTList(), Ops, MemVT,
9607 ArrayRef<SDValue> Ops, EVT MemVT,
9641 EVT WidenedMemVT = EVT::getVectorVT(C, MemVT.getVectorElementType(), 4);
9651 return DAG.getMemIntrinsicNode(Opcode, DL, VTList, Ops, MemVT, MMO);
10497 EVT MemVT = Ld->getMemoryVT();
10498 if ((MemVT.isSimple() && !DCI.isAfterLegalizeDAG()) ||
10499 MemVT.getSizeInBits() >= 32)
10504 assert((!MemVT.isVector() || Ld->getExtensionType() == ISD::NON_EXTLOAD) &&
10515 EVT TruncVT = EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits());
10516 if (MemVT.isFloatingPoint()) {
10519 TruncVT = MemVT.changeTypeToInteger();
10561 EVT MemVT = Load->getMemoryVT();
10564 if (ExtType == ISD::NON_EXTLOAD && MemVT.getSizeInBits() < 32) {
10565 if (MemVT == MVT::i16 && isTypeLegal(MVT::i16))
10574 EVT RealMemVT = (MemVT == MVT::i1) ? MVT::i8 : MVT::i16;
10579 if (!MemVT.isVector()) {
10580 SDValue Ops[] = {DAG.getNode(ISD::TRUNCATE, DL, MemVT, NewLD),
10587 for (unsigned I = 0, N = MemVT.getVectorNumElements(); I != N; ++I) {
10594 SDValue Ops[] = {DAG.getBuildVector(MemVT, DL, Elts), NewLD.getValue(1)};
10599 if (!MemVT.isVector())
10608 Alignment.value() < MemVT.getStoreSize() && MemVT.getSizeInBits() > 32) {
10622 unsigned NumElements = MemVT.getVectorNumElements();
10631 if (MemVT.isPow2VectorType() ||
10681 if (allowsMisalignedMemoryAccessesImpl(MemVT.getSizeInBits(), AS,
10686 if (MemVT.isVector())
10691 MemVT, *Load->getMemOperand())) {
11627 EVT MemVT,
11655 Type *Ty = MemVT.getTypeForEVT(*DCI.DAG.getContext());
12398 auto MemVT = L->getMemoryVT();
12399 return !MemVT.isVector() && MemVT.getSizeInBits() == 16;