Lines Matching defs:Src1

263     MachineOperand *Src1 = &Def->getOperand(2);
268     if (!Src0->isFI() && !Src1->isFI())
272       std::swap(Src0, Src1);
292       Add.add(*Src0).add(*Src1).setMIFlags(Def->getFlags());
309           .add(*Src1)
737   // Special case for s_fmac_f32 if we are trying to fold into Src0 or Src1.
739   // If folding for Src0 happens first and it is identical operand to Src1 we
741   // cause folding into Src1 to fail later on due to wrong OpNo used.
1338   MachineOperand *Src1 = getImmOrMaterializedImm(MI->getOperand(Src1Idx));
1340   if (!Src0->isImm() && !Src1->isImm())
1346   if (Src0->isImm() && Src1->isImm()) {
1348     if (!evalBinaryInstruction(Opc, NewImm, Src0->getImm(), Src1->getImm()))
1364   if (Src0->isImm() && !Src1->isImm()) {
1365     std::swap(Src0, Src1);
1369   int32_t Src1Val = static_cast<int32_t>(Src1->getImm());
1424   MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1425   if (!Src1->isIdenticalTo(*Src0)) {
1427     auto *Src1Imm = getImmOrMaterializedImm(*Src1);
1465   Register Src1 = MI.getOperand(2).getReg();
1466   MachineInstr *SrcDef = MRI->getVRegDef(Src1);
1471   MRI->replaceRegWith(Dst, Src1);
1473     MRI->clearKillFlags(Src1);
1653     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1654     if (!Src0->isReg() || !Src1->isReg() ||
1655         Src0->getReg() != Src1->getReg() ||
1656         Src0->getSubReg() != Src1->getSubReg() ||
1801     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1804       RegOp = Src1;
1805     } else if (Src1->isImm()) {
1806       ImmOp = Src1;
1838     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1840     if (Src0->isReg() && Src1->isReg() && Src0->getReg() == Src1->getReg() &&
1841         Src0->getSubReg() == Src1->getSubReg() &&