Lines Matching defs:Src0
262 MachineOperand *Src0 = &Def->getOperand(1);
268 if (!Src0->isFI() && !Src1->isFI())
271 if (Src0->isFI())
272 std::swap(Src0, Src1);
274 const bool UseVOP3 = !Src0->isImm() || TII->isInlineConstant(*Src0);
292 Add.add(*Src0).add(*Src1).setMIFlags(Def->getFlags());
308 .add(*Src0)
737 // Special case for s_fmac_f32 if we are trying to fold into Src0 or Src1.
739 // If folding for Src0 happens first and it is identical operand to Src1 we
1325 MachineOperand *Src0 = getImmOrMaterializedImm(MI->getOperand(Src0Idx));
1329 Src0->isImm()) {
1330 MI->getOperand(1).ChangeToImmediate(~Src0->getImm());
1340 if (!Src0->isImm() && !Src1->isImm())
1346 if (Src0->isImm() && Src1->isImm()) {
1348 if (!evalBinaryInstruction(Opc, NewImm, Src0->getImm(), Src1->getImm()))
1364 if (Src0->isImm() && !Src1->isImm()) {
1365 std::swap(Src0, Src1);
1423 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
1425 if (!Src1->isIdenticalTo(*Src0)) {
1426 auto *Src0Imm = getImmOrMaterializedImm(*Src0);
1442 TII->get(Src0->isReg() ? (unsigned)AMDGPU::COPY : getMovOpc(false));
1461 MachineOperand *Src0 = getImmOrMaterializedImm(MI.getOperand(1));
1462 if (!Src0->isImm() || Src0->getImm() != 0xffff)
1652 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
1654 if (!Src0->isReg() || !Src1->isReg() ||
1655 Src0->getReg() != Src1->getReg() ||
1656 Src0->getSubReg() != Src1->getSubReg() ||
1657 Src0->getSubReg() != AMDGPU::NoSubRegister)
1675 return Src0;
1800 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
1802 if (Src0->isImm()) {
1803 ImmOp = Src0;
1807 RegOp = Src0;
1837 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
1840 if (Src0->isReg() && Src1->isReg() && Src0->getReg() == Src1->getReg() &&
1841 Src0->getSubReg() == Src1->getSubReg() &&
1846 return std::pair(Src0, SIOutMods::MUL2);