Lines Matching defs:SrcRC

207   const TargetRegisterClass *SrcRC = SrcReg.isVirtual()
212   // SrcRC = TRI.getSubRegClass(SrcRC, Copy.getOperand(1).getSubReg());
218   return std::pair(SrcRC, DstRC);
221 static bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC,
224   return SrcRC != &AMDGPU::VReg_1RegClass && TRI.isSGPRClass(DstRC) &&
225          TRI.hasVectorRegisters(SrcRC);
228 static bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC,
231   return DstRC != &AMDGPU::VReg_1RegClass && TRI.isSGPRClass(SrcRC) &&
297   const TargetRegisterClass *SrcRC, *DstRC;
298   std::tie(SrcRC, DstRC) = getCopyRegClasses(CopyUse, *TRI, MRI);
300   if (!isSGPRToVGPRCopy(SrcRC, DstRC, *TRI))
325     const TargetRegisterClass *SrcRC =
327     assert(TRI->isSGPRClass(SrcRC) &&
329     const TargetRegisterClass *NewSrcRC = TRI->getEquivalentVGPRClass(SrcRC);
338       const TargetRegisterClass *NewSrcRC = TRI->getEquivalentAGPRClass(SrcRC);
641         const TargetRegisterClass *SrcRC, *DstRC;
642         std::tie(SrcRC, DstRC) = getCopyRegClasses(MI, *TRI, *MRI);
644         if (isSGPRToVGPRCopy(SrcRC, DstRC, *TRI)) {
655         if (!isVGPRToSGPRCopy(SrcRC, DstRC, *TRI))
671             const TargetRegisterClass *SrcRC = MRI->getRegClass(MO.getReg());
672             if (TRI->hasVectorRegisters(SrcRC)) {
674                   TRI->getEquivalentSGPRClass(SrcRC);
774       const TargetRegisterClass *SrcRC, *DstRC;
775       std::tie(SrcRC, DstRC) = getCopyRegClasses(*MI, *TRI, *MRI);
776       if (isSGPRToVGPRCopy(SrcRC, DstRC, *TRI))
865   const TargetRegisterClass *SrcRC =
867   unsigned MoveSize = TRI->getRegSizeInBits(*SrcRC);
1074     const TargetRegisterClass *SrcRC =
1076     size_t SrcSize = TRI->getRegSizeInBits(*SrcRC);
1089       int N = TRI->getRegSizeInBits(*SrcRC) / 32;
1092             Result, *MRI, MI->getOperand(1), SrcRC,