Lines Matching defs:Ctx

22                                                      MCContext &Ctx) {
26   const MCExpr *ZeroMCExpr = MCConstantExpr::create(0, Ctx);
27   const MCExpr *OneMCExpr = MCConstantExpr::create(1, Ctx);
40       MCConstantExpr::create(amdhsa::FLOAT_DENORM_MODE_FLUSH_NONE, Ctx),
42       amdhsa::COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_16_64, Ctx);
47         amdhsa::COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_DX10_CLAMP, Ctx);
51         amdhsa::COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_IEEE_MODE, Ctx);
56       amdhsa::COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_X, Ctx);
62           amdhsa::KERNEL_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32, Ctx);
67           amdhsa::COMPUTE_PGM_RSRC1_GFX10_PLUS_WGP_MODE, Ctx);
72         amdhsa::COMPUTE_PGM_RSRC1_GFX10_PLUS_MEM_ORDERED, Ctx);
78         amdhsa::COMPUTE_PGM_RSRC3_GFX90A_TG_SPLIT, Ctx);
84                                   MCContext &Ctx) {
85   const auto *Sft = MCConstantExpr::create(Shift, Ctx);
86   const auto *Msk = MCConstantExpr::create(Mask, Ctx);
87   Dst = MCBinaryExpr::createAnd(Dst, MCUnaryExpr::createNot(Msk, Ctx), Ctx);
88   Dst = MCBinaryExpr::createOr(Dst, MCBinaryExpr::createShl(Value, Sft, Ctx),
89                                Ctx);
93                                            uint32_t Mask, MCContext &Ctx) {
94   const auto *Sft = MCConstantExpr::create(Shift, Ctx);
95   const auto *Msk = MCConstantExpr::create(Mask, Ctx);
96   return MCBinaryExpr::createLShr(MCBinaryExpr::createAnd(Src, Msk, Ctx), Sft,
97                                   Ctx);