Lines Matching full:o
51 raw_ostream &O) {
54 Op.getExpr()->print(O, &MAI);
62 O << formatHex(static_cast<uint64_t>(Imm & 0xffff));
64 printU32ImmOperand(MI, OpNo, STI, O);
68 raw_ostream &O) {
69 O << formatDec(MI->getOperand(OpNo).getImm() & 0xffff);
74 raw_ostream &O) {
75 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffffffff);
79 raw_ostream &O, StringRef BitName) {
81 O << ' ' << BitName;
87 raw_ostream &O) {
90 O << " offset:";
96 O << formatDec(SignExtend32<24>(Imm));
98 printU16ImmDecOperand(MI, OpNo, O);
104 raw_ostream &O) {
107 O << " offset:";
115 O << formatDec(SignExtend32(Imm, AMDGPU::getNumFlatOffsetBits(STI)));
117 printU16ImmDecOperand(MI, OpNo, O);
123 raw_ostream &O) {
124 printU32ImmOperand(MI, OpNo, STI, O);
129 raw_ostream &O) {
130 O << formatHex(MI->getOperand(OpNo).getImm());
135 raw_ostream &O) {
136 printU32ImmOperand(MI, OpNo, STI, O);
140 const MCSubtargetInfo &STI, raw_ostream &O) {
147 printTH(MI, TH, Scope, O);
148 printScope(Scope, O);
154 O << ((AMDGPU::isGFX940(STI) &&
158 O << (AMDGPU::isGFX940(STI) ? " nt" : " slc");
160 O << " dlc";
162 O << (AMDGPU::isGFX940(STI) ? " sc1" : " scc");
164 O << " /* unexpected cache policy bit */";
168 raw_ostream &O) {
179 O << " th:";
182 O << "TH_ATOMIC_";
185 O << "CASCADE" << (TH & AMDGPU::CPol::TH_ATOMIC_NT ? "_NT" : "_RT");
187 O << formatHex(TH);
189 O << "NT" << (TH & AMDGPU::CPol::TH_ATOMIC_RETURN ? "_RETURN" : "");
191 O << "RETURN";
193 O << formatHex(TH);
196 O << formatHex(TH);
201 O << (IsStore ? "TH_STORE_" : "TH_LOAD_");
204 O << "NT";
207 O << "HT";
210 O << (Scope == AMDGPU::CPol::SCOPE_SYS ? "BYPASS"
214 O << "NT_RT";
217 O << "RT_NT";
220 O << "NT_HT";
223 O << "NT_WB";
232 void AMDGPUInstPrinter::printScope(int64_t Scope, raw_ostream &O) {
236 O << " scope:";
239 O << "SCOPE_SE";
241 O << "SCOPE_DEV";
243 O << "SCOPE_SYS";
249 const MCSubtargetInfo &STI, raw_ostream &O) {
251 O << " dim:SQ_RSRC_IMG_";
255 O << DimInfo->AsmSuffix;
257 O << Dim;
261 const MCSubtargetInfo &STI, raw_ostream &O) {
263 printNamedBit(MI, OpNo, O, "a16");
265 printNamedBit(MI, OpNo, O, "r128");
270 raw_ostream &O) {
275 raw_ostream &O) {
287 O << " format:[" << getUnifiedFormatName(Val, STI) << ']';
289 O << " format:" << Val;
298 O << " format:[";
300 O << getDfmtName(Dfmt);
302 O << ',';
306 O << getNfmtName(Nfmt, STI);
308 O << ']';
310 O << " format:" << Val;
315 void AMDGPUInstPrinter::printRegOperand(MCRegister Reg, raw_ostream &O,
328 O << getRegisterName(Reg);
332 const MCSubtargetInfo &STI, raw_ostream &O) {
337 O << "_e64_dpp";
340 O << "_e64";
342 O << "_dpp";
344 O << "_sdwa";
347 O << "_e32";
348 O << " ";
351 printRegularOperand(MI, OpNo, STI, O);
387 printDefaultVccOperand(false, STI, O);
393 const MCSubtargetInfo &STI, raw_ostream &O) {
395 O << " ";
397 O << "_e32 ";
399 printRegularOperand(MI, OpNo, STI, O);
404 raw_ostream &O) {
407 O << SImm;
411 if (printImmediateFloat32(Imm, STI, O))
414 O << formatHex(static_cast<uint64_t>(Imm & 0xffff));
418 raw_ostream &O) {
420 O << "1.0";
422 O << "-1.0";
424 O << "0.5";
426 O << "-0.5";
428 O << "2.0";
430 O << "-2.0";
432 O << "4.0";
434 O << "-4.0";
436 O << "0.15915494";
444 raw_ostream &O) {
446 O << "1.0";
448 O << "-1.0";
450 O << "0.5";
452 O << "-0.5";
454 O << "2.0";
456 O << "-2.0";
458 O << "4.0";
460 O << "-4.0";
462 O << "0.15915494";
471 raw_ostream &O) {
474 O << SImm;
478 if (printImmediateBFloat16(static_cast<uint16_t>(Imm), STI, O))
481 O << formatHex(static_cast<uint64_t>(Imm));
486 raw_ostream &O) {
489 O << SImm;
494 if (printImmediateFP16(HImm, STI, O))
498 O << formatHex(Imm16);
503 raw_ostream &O) {
506 O << SImm;
514 if (printImmediateFloat32(Imm, STI, O))
521 printImmediateFP16(static_cast<uint16_t>(Imm), STI, O))
528 printImmediateBFloat16(static_cast<uint16_t>(Imm), STI, O))
535 O << formatHex(static_cast<uint64_t>(Imm));
540 raw_ostream &O) {
542 O << "0.0";
544 O << "1.0";
546 O << "-1.0";
548 O << "0.5";
550 O << "-0.5";
552 O << "2.0";
554 O << "-2.0";
556 O << "4.0";
558 O << "-4.0";
561 O << "0.15915494";
570 raw_ostream &O) {
573 O << SImm;
577 if (printImmediateFloat32(Imm, STI, O))
580 O << formatHex(static_cast<uint64_t>(Imm));
585 raw_ostream &O, bool IsFP) {
588 O << SImm;
593 O << "0.0";
595 O << "1.0";
597 O << "-1.0";
599 O << "0.5";
601 O << "-0.5";
603 O << "2.0";
605 O << "-2.0";
607 O << "4.0";
609 O << "-4.0";
612 O << "0.15915494309189532";
615 O << formatHex(static_cast<uint64_t>(Hi_32(Imm)));
621 O << formatHex(static_cast<uint64_t>(Imm));
627 raw_ostream &O) {
638 O << " neg:[" << (Imm & 1) << ',' << ((Imm >> 1) & 1) << ','
644 O << " blgp:" << Imm;
649 raw_ostream &O) {
651 O << ", ";
655 O, MRI);
657 O << ", ";
672 raw_ostream &O) {
684 printDefaultVccOperand(true, STI, O);
686 printRegularOperand(MI, OpNo, STI, O);
692 raw_ostream &O) {
696 O << "/*Missing OP" << OpNo << "*/";
702 printRegOperand(Op.getReg(), O, MRI);
712 O << "/*Invalid register, operand has \'" << MRI.getRegClassName(&RC)
732 printImmediate32(Op.getImm(), STI, O);
736 printImmediate64(Op.getImm(), STI, O, false);
741 printImmediate64(Op.getImm(), STI, O, true);
746 printImmediateInt16(Op.getImm(), STI, O);
752 printImmediateF16(Op.getImm(), STI, O);
758 printImmediateBF16(Op.getImm(), STI, O);
769 printImmediateV216(Op.getImm(), OpTy, STI, O);
773 O << formatDec(Op.getImm());
778 printImmediate32(Op.getImm(), STI, O);
779 O << "/*Invalid immediate*/";
790 O << "0.0";
796 printImmediate32(llvm::bit_cast<uint32_t>((float)Value), STI, O);
798 printImmediate64(llvm::bit_cast<uint64_t>(Value), STI, O, true);
804 Exp->print(O, &MAI);
806 O << "/*INV_OP*/";
852 printDefaultVccOperand(OpNo == 0, STI, O);
861 printSymbolicFormat(MI, STI, O);
868 raw_ostream &O) {
871 printDefaultVccOperand(true, STI, O);
887 O << "neg(";
889 O << '-';
894 O << '|';
895 printRegularOperand(MI, OpNo + 1, STI, O);
897 O << '|';
900 O << ')';
913 printDefaultVccOperand(OpNo == 0, STI, O);
921 raw_ostream &O) {
924 printDefaultVccOperand(true, STI, O);
928 O << "sext(";
929 printRegularOperand(MI, OpNo + 1, STI, O);
931 O << ')';
942 printDefaultVccOperand(OpNo == 0, STI, O);
949 raw_ostream &O) {
954 O << "dpp8:[" << formatDec(Imm & 0x7);
956 O << ',' << formatDec((Imm >> (3 * i)) & 0x7);
958 O << ']';
963 raw_ostream &O) {
970 O << " /* DP ALU dpp only supports row_newbcast */";
974 O << "quad_perm:[";
975 O << formatDec(Imm & 0x3) << ',';
976 O << formatDec((Imm & 0xc) >> 2) << ',';
977 O << formatDec((Imm & 0x30) >> 4) << ',';
978 O << formatDec((Imm & 0xc0) >> 6) << ']';
981 O << "row_shl:" << formatDec(Imm - DppCtrl::ROW_SHL0);
984 O << "row_shr:" << formatDec(Imm - DppCtrl::ROW_SHR0);
987 O << "row_ror:" << formatDec(Imm - DppCtrl::ROW_ROR0);
990 O << "/* wave_shl is not supported starting from GFX10 */";
993 O << "wave_shl:1";
996 O << "/* wave_rol is not supported starting from GFX10 */";
999 O << "wave_rol:1";
1002 O << "/* wave_shr is not supported starting from GFX10 */";
1005 O << "wave_shr:1";
1008 O << "/* wave_ror is not supported starting from GFX10 */";
1011 O << "wave_ror:1";
1013 O << "row_mirror";
1015 O << "row_half_mirror";
1018 O << "/* row_bcast is not supported starting from GFX10 */";
1021 O << "row_bcast:15";
1024 O << "/* row_bcast is not supported starting from GFX10 */";
1027 O << "row_bcast:31";
1031 O << "row_newbcast:";
1033 O << "row_share:";
1035 O << " /* row_newbcast/row_share is not supported on ASICs earlier "
1039 O << formatDec(Imm - DppCtrl::ROW_SHARE_FIRST);
1043 O << "/* row_xmask is not supported on ASICs earlier than GFX10 */";
1046 O << "row_xmask:" << formatDec(Imm - DppCtrl::ROW_XMASK_FIRST);
1048 O << "/* Invalid dpp_ctrl value */";
1054 raw_ostream &O) {
1057 O << " bound_ctrl:1";
1062 const MCSubtargetInfo &STI, raw_ostream &O) {
1066 O << " fi:1";
1071 raw_ostream &O) {
1076 case SdwaSel::BYTE_0: O << "BYTE_0"; break;
1077 case SdwaSel::BYTE_1: O << "BYTE_1"; break;
1078 case SdwaSel::BYTE_2: O << "BYTE_2"; break;
1079 case SdwaSel::BYTE_3: O << "BYTE_3"; break;
1080 case SdwaSel::WORD_0: O << "WORD_0"; break;
1081 case SdwaSel::WORD_1: O << "WORD_1"; break;
1082 case SdwaSel::DWORD: O << "DWORD"; break;
1089 raw_ostream &O) {
1090 O << "dst_sel:";
1091 printSDWASel(MI, OpNo, O);
1096 raw_ostream &O) {
1097 O << "src0_sel:";
1098 printSDWASel(MI, OpNo, O);
1103 raw_ostream &O) {
1104 O << "src1_sel:";
1105 printSDWASel(MI, OpNo, O);
1110 raw_ostream &O) {
1113 O << "dst_unused:";
1116 case DstUnused::UNUSED_PAD: O << "UNUSED_PAD"; break;
1117 case DstUnused::UNUSED_SEXT: O << "UNUSED_SEXT"; break;
1118 case DstUnused::UNUSED_PRESERVE: O << "UNUSED_PRESERVE"; break;
1124 const MCSubtargetInfo &STI, raw_ostream &O,
1137 printRegOperand(MI->getOperand(OpNo).getReg(), O, MRI);
1139 O << "off";
1144 raw_ostream &O) {
1145 printExpSrcN(MI, OpNo, STI, O, 0);
1150 raw_ostream &O) {
1151 printExpSrcN(MI, OpNo, STI, O, 1);
1156 raw_ostream &O) {
1157 printExpSrcN(MI, OpNo, STI, O, 2);
1162 raw_ostream &O) {
1163 printExpSrcN(MI, OpNo, STI, O, 3);
1168 raw_ostream &O) {
1177 O << ' ' << TgtName;
1179 O << Index;
1181 O << " invalid_target_" << Id;
1203 raw_ostream &O) {
1251 O << Name;
1254 O << ',';
1256 O << !!(Ops[I] & Mod);
1260 O << ',' << !!(Ops[0] & SISrcMods::DST_OP_SEL);
1263 O << ']';
1268 raw_ostream &O) {
1277 O << " op_sel:[" << Index0 << ',' << Index1 << ']';
1286 O << " op_sel:[" << FI << ',' << BC << ']';
1290 printPackedModifier(MI, " op_sel:[", SISrcMods::OP_SEL_0, O);
1295 raw_ostream &O) {
1296 printPackedModifier(MI, " op_sel_hi:[", SISrcMods::OP_SEL_1, O);
1301 raw_ostream &O) {
1302 printPackedModifier(MI, " neg_lo:[", SISrcMods::NEG, O);
1307 raw_ostream &O) {
1308 printPackedModifier(MI, " neg_hi:[", SISrcMods::NEG_HI, O);
1313 raw_ostream &O) {
1318 O << " index_key:" << Imm;
1323 raw_ostream &O) {
1328 O << " index_key:" << Imm;
1333 raw_ostream &O) {
1337 O << "p10";
1340 O << "p20";
1343 O << "p0";
1346 O << "invalid_param_" << Imm;
1352 raw_ostream &O) {
1354 O << "attr" << Attr;
1359 raw_ostream &O) {
1361 O << '.' << "xyzw"[Chan & 0x3];
1366 raw_ostream &O) {
1371 O << formatHex(static_cast<uint64_t>(Val));
1373 O << "gpr_idx(";
1378 O << ',';
1379 O << IdSymbolic[ModeId];
1383 O << ')';
1389 raw_ostream &O) {
1390 printRegularOperand(MI, OpNo, STI, O);
1391 O << ", ";
1392 printRegularOperand(MI, OpNo + 1, STI, O);
1396 raw_ostream &O, StringRef Asm,
1401 O << Asm;
1403 O << Default;
1408 raw_ostream &O, char Asm) {
1412 O << Asm;
1417 raw_ostream &O) {
1420 O << " mul:2";
1422 O << " mul:4";
1424 O << " div:2";
1429 raw_ostream &O) {
1443 O << "sendmsg(" << MsgName;
1445 O << ", " << getMsgOpName(MsgId, OpId, STI);
1447 O << ", " << StreamId;
1450 O << ')';
1452 O << "sendmsg(" << MsgId << ", " << OpId << ", " << StreamId << ')';
1454 O << Imm16; // Unknown imm16 code.
1461 raw_ostream &O) {
1467 O << "\"";
1475 O << "0";
1477 O << "1";
1481 O << "p";
1483 O << "i";
1488 O << "\"";
1493 raw_ostream &O) {
1501 O << " offset:";
1506 O << "swizzle(" << IdSymbolic[ID_FFT] << ',' << (Imm & FFT_SWIZZLE_MASK)
1509 O << "swizzle(" << IdSymbolic[ID_ROTATE] << ','
1518 O << "swizzle(" << IdSymbolic[ID_QUAD_PERM];
1520 O << ",";
1521 O << formatDec(Imm & LANE_MASK);
1524 O << ")";
1534 O << "swizzle(" << IdSymbolic[ID_SWAP];
1535 O << ",";
1536 O << formatDec(XorMask);
1537 O << ")";
1542 O << "swizzle(" << IdSymbolic[ID_REVERSE];
1543 O << ",";
1544 O << formatDec(XorMask + 1);
1545 O << ")";
1555 O << "swizzle(" << IdSymbolic[ID_BROADCAST];
1556 O << ",";
1557 O << formatDec(GroupSize);
1558 O << ",";
1559 O << formatDec(OrMask);
1560 O << ")";
1563 O << "swizzle(" << IdSymbolic[ID_BITMASK_PERM];
1564 O << ",";
1565 printSwizzleBitmask(AndMask, OrMask, XorMask, O);
1566 O << ")";
1570 printU16ImmDecOperand(MI, OpNo, O);
1576 raw_ostream &O) {
1591 O << "vmcnt(" << Vmcnt << ')';
1597 O << ' ';
1598 O << "expcnt(" << Expcnt << ')';
1604 O << ' ';
1605 O << "lgkmcnt(" << Lgkmcnt << ')';
1611 raw_ostream &O) {
1626 O << ' ';
1627 O << Name << '(' << Val << ')';
1632 O << formatHex(Imm16);
1638 raw_ostream &O) {
1656 O << Prefix << "instid0(" << Name << ')';
1664 O << Prefix << "instskip(" << Name << ')';
1671 O << Prefix << "instid1(" << Name << ')';
1676 O << "0";
1680 const MCSubtargetInfo &STI, raw_ostream &O) {
1686 O << "hwreg(";
1688 O << HwRegName;
1690 O << Id;
1693 O << ", " << Offset << ", " << Width;
1694 O << ')';
1699 raw_ostream &O) {
1705 O << ' ' << formatDec(Imm);
1710 raw_ostream &O, StringRef Prefix,
1714 O << ' ' << Prefix << ':' << (PrintInHex ? formatHex(V) : formatDec(V));
1719 raw_ostream &O) {
1724 O << " bitop3:";
1726 O << formatDec(Imm);
1728 O << formatHex(static_cast<uint64_t>(Imm));