Lines Matching defs:MovMI
64 MachineInstr *createDPPInst(MachineInstr &OrigMI, MachineInstr &MovMI,
69 MachineInstr *createDPPInst(MachineInstr &OrigMI, MachineInstr &MovMI,
210 MachineInstr &MovMI,
214 assert(MovMI.getOpcode() == AMDGPU::V_MOV_B32_dpp ||
215 MovMI.getOpcode() == AMDGPU::V_MOV_B64_dpp ||
216 MovMI.getOpcode() == AMDGPU::V_MOV_B64_DPP_PSEUDO);
227 auto *RowMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask);
229 auto *BankMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask);
264 TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst)->getReg()),
294 auto *Src0 = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0);
423 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::dpp_ctrl));
424 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask));
425 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask));
490 MachineInstr &OrigMI, MachineInstr &MovMI, RegSubRegPair CombOldVGPR,
504 auto *MovDst = TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst);
511 return createDPPInst(OrigMI, MovMI, CombOldVGPR, CombBCZ, IsShrinkable);
526 bool GCNDPPCombine::combineDPPMov(MachineInstr &MovMI) const {
527 assert(MovMI.getOpcode() == AMDGPU::V_MOV_B32_dpp ||
528 MovMI.getOpcode() == AMDGPU::V_MOV_B64_dpp ||
529 MovMI.getOpcode() == AMDGPU::V_MOV_B64_DPP_PSEUDO);
530 LLVM_DEBUG(dbgs() << "\nDPP combine: " << MovMI);
532 auto *DstOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst);
539 if (execMayBeModifiedBeforeAnyUse(*MRI, DPPMovReg, MovMI)) {
545 if (MovMI.getOpcode() == AMDGPU::V_MOV_B64_DPP_PSEUDO ||
546 MovMI.getOpcode() == AMDGPU::V_MOV_B64_dpp) {
547 auto *DppCtrl = TII->getNamedOperand(MovMI, AMDGPU::OpName::dpp_ctrl);
557 auto *RowMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask);
559 auto *BankMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask);
564 auto *BCZOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bound_ctrl);
568 auto *OldOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::old);
569 auto *SrcOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0);
622 auto UndefInst = BuildMI(*MovMI.getParent(), MovMI, MovMI.getDebugLoc(),
627 OrigMIs.push_back(&MovMI);
710 if (auto *DPPInst = createDPPInst(OrigMI, MovMI, CombOldVGPR,
723 createDPPInst(*NewMI, MovMI, CombOldVGPR, OldOpndValue, CombBCZ,