Lines Matching defs:RegIdx

301   unsigned RegIdx = Imm & 0xff;
303   return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
312   unsigned RegIdx = Imm & 0x7f;
314   return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
327     unsigned RegIdx = Imm & 0x7f;
328     return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
346     unsigned RegIdx = Imm & 0x7f;
347     return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
364     unsigned RegIdx = Imm & 0xff;
365     return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
381   unsigned RegIdx = Imm & 0xff;
382   return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
977       unsigned RegIdx = OpEnc & AMDGPU::HWEncoding::REG_IDX_MASK;
978       Op.setReg(ConversionRC.getRegister(RegIdx * 2 + 1));
1370 MCOperand AMDGPUDisassembler::createVGPR16Operand(unsigned RegIdx,
1372   unsigned RegIdxInVGPR16 = RegIdx * 2 + (IsHi ? 1 : 0);