Lines Matching defs:SrcRC

113   const TargetRegisterClass *SrcRC
115   if (!DstRC || DstRC != SrcRC)
119          RBI.constrainGenericRegister(Src.getReg(), *SrcRC, *MRI);
146       const TargetRegisterClass *SrcRC
157         Register MaskedReg = MRI->createVirtualRegister(SrcRC);
163         if (AMDGPU::getRegBitWidth(SrcRC->getID()) == 16) {
179           bool IsSGPR = TRI.isSGPRClass(SrcRC);
194         MRI->setRegClass(SrcReg, SrcRC);
328       const TargetRegisterClass *SrcRC =
330       if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI))
615   const TargetRegisterClass *SrcRC =
617   if (!SrcRC)
621   SrcRC = TRI.getSubClassWithSubReg(SrcRC, SubReg);
622   if (!SrcRC)
626                                     *SrcRC, I.getOperand(1));
661     const TargetRegisterClass *SrcRC
663     if (SrcRC && !RBI.constrainGenericRegister(Src.getReg(), *SrcRC, *MRI))
690   const TargetRegisterClass *SrcRC =
692   if (!SrcRC || !RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI))
698   ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(SrcRC, DstSize / 8);
705     SrcRC = TRI.getSubClassWithSubReg(SrcRC, SubRegs[I]);
706     if (!SrcRC || !RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI))
2409   const TargetRegisterClass *SrcRC =
2413   if (!SrcRC || !DstRC)
2416   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI) ||
2506       = TRI.getSubClassWithSubReg(SrcRC, SubRegIdx);
2510     if (SrcWithSubRC != SrcRC) {
2567     const TargetRegisterClass *SrcRC =
2573     Register UndefReg = MRI->createVirtualRegister(SrcRC);
2583            RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI);
2611     const TargetRegisterClass &SrcRC = InReg && DstSize > 32 ?
2613     if (!RBI.constrainGenericRegister(SrcReg, SrcRC, *MRI))
3090   const TargetRegisterClass *SrcRC = TRI.getRegClassForTypeOnBank(Ty, *SrcRB);
3095       !RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI) ||
3207   const TargetRegisterClass *SrcRC =
3211   if (!SrcRC || !DstRC)
3213   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI) ||
3224       *MRI, TRI, SrcRC, IdxReg, DstTy.getSizeInBits() / 8, *KB);
3255       TII.getIndirectGPRIDXPseudo(TRI.getRegSizeInBits(*SrcRC), true);