Lines Matching defs:CCReg

1452   Register CCReg = I.getOperand(0).getReg();
1453   if (!isVCC(CCReg, *MRI)) {
1460     BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), CCReg)
1464         RBI.constrainGenericRegister(CCReg, AMDGPU::SReg_32RegClass, *MRI);
2345   Register CCReg = CCOp.getReg();
2346   if (!isVCC(CCReg, *MRI)) {
2350             .addReg(CCReg);
2355     if (!MRI->getRegClassOrNull(CCReg))
2356         MRI->setRegClass(CCReg, TRI.getConstrainedRegClassForOperand(CCOp, *MRI));
5878   Register CCReg = I.getOperand(0).getReg();
5883   BuildMI(*MBB, &I, DL, TII.get(AMDGPU::COPY), CCReg).addReg(AMDGPU::SCC);
5886   return RBI.constrainGenericRegister(CCReg, AMDGPU::SReg_32_XM0_XEXECRegClass,