Lines Matching defs:SL
933 SDLoc SL(Op);
938 return DAG.getNode(AMDGPUISD::RCP, SL, VT, NegSrc, Op->getFlags());
1557 SDLoc SL(Op);
1569 SDValue NewIn = DAG.getNode(ISD::BITCAST, SL, NewEltVT, In);
1578 SDValue BV = DAG.getBuildVector(NewVT, SL, Args);
1579 return DAG.getNode(ISD::BITCAST, SL, VT, BV);
1586 return DAG.getBuildVector(Op.getValueType(), SL, Args);
1591 SDLoc SL(Op);
1607 SDValue Tmp = DAG.getNode(ISD::BITCAST, SL, NewSrcVT, Op.getOperand(0));
1613 Tmp = DAG.getBuildVector(NewVT, SL, Args);
1615 return DAG.getNode(ISD::BITCAST, SL, VT, Tmp);
1621 return DAG.getBuildVector(Op.getValueType(), SL, Args);
1751 SDLoc SL(Op);
1753 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1755 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
1756 const SDValue One = DAG.getConstant(1, SL, MVT::i32);
1758 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero);
1759 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One);
1765 SDLoc SL(Op);
1767 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1768 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
1769 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero);
1773 SDLoc SL(Op);
1775 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1776 const SDValue One = DAG.getConstant(1, SL, MVT::i32);
1777 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One);
1818 SDLoc SL(Op);
1826 return DAG.getMergeValues(Ops, SL);
1840 std::tie(Lo, Hi) = splitVector(Op, SL, LoVT, HiVT, DAG);
1846 SDValue LoLoad = DAG.getExtLoad(Load->getExtensionType(), SL, LoVT,
1849 SDValue HiPtr = DAG.getObjectPtrOffset(SL, BasePtr, TypeSize::getFixed(Size));
1851 DAG.getExtLoad(Load->getExtensionType(), SL, HiVT, Load->getChain(),
1858 Join = DAG.getNode(ISD::CONCAT_VECTORS, SL, VT, LoLoad, HiLoad);
1860 Join = DAG.getNode(ISD::INSERT_SUBVECTOR, SL, VT, DAG.getUNDEF(VT), LoLoad,
1861 DAG.getVectorIdxConstant(0, SL));
1863 HiVT.isVector() ? ISD::INSERT_SUBVECTOR : ISD::INSERT_VECTOR_ELT, SL,
1865 DAG.getVectorIdxConstant(LoVT.getVectorNumElements(), SL));
1868 SDValue Ops[] = {Join, DAG.getNode(ISD::TokenFactor, SL, MVT::Other,
1871 return DAG.getMergeValues(Ops, SL);
1880 SDLoc SL(Op);
1899 Load->getExtensionType(), SL, WideVT, Load->getChain(), BasePtr, SrcValue,
1902 {DAG.getNode(ISD::EXTRACT_SUBVECTOR, SL, VT, WideLoad,
1903 DAG.getVectorIdxConstant(0, SL)),
1905 SL);
1922 SDLoc SL(Op);
1930 std::tie(Lo, Hi) = splitVector(Val, SL, LoVT, HiVT, DAG);
1932 SDValue HiPtr = DAG.getObjectPtrOffset(SL, BasePtr, LoMemVT.getStoreSize());
1940 DAG.getTruncStore(Chain, SL, Lo, BasePtr, SrcValue, LoMemVT, BaseAlign,
1943 DAG.getTruncStore(Chain, SL, Hi, HiPtr, SrcValue.getWithOffset(Size),
1946 return DAG.getNode(ISD::TokenFactor, SL, MVT::Other, LoStore, HiStore);
2398 SDLoc SL(Op);
2404 SDValue Div = DAG.getNode(ISD::FDIV, SL, VT, X, Y, Flags);
2405 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, VT, Div, Flags);
2406 SDValue Neg = DAG.getNode(ISD::FNEG, SL, VT, Trunc, Flags);
2408 return DAG.getNode(ISD::FMA, SL, VT, Neg, Y, X, Flags);
2412 SDLoc SL(Op);
2419 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src);
2421 const SDValue Zero = DAG.getConstantFP(0.0, SL, MVT::f64);
2422 const SDValue One = DAG.getConstantFP(1.0, SL, MVT::f64);
2427 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT);
2428 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE);
2429 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc);
2431 SDValue Add = DAG.getNode(ISD::SELECT, SL, MVT::f64, And, One, Zero);
2433 return DAG.getNode(ISD::FADD, SL, MVT::f64, Trunc, Add);
2436 static SDValue extractF64Exponent(SDValue Hi, const SDLoc &SL,
2441 SDValue ExpPart = DAG.getNode(AMDGPUISD::BFE_U32, SL, MVT::i32,
2443 DAG.getConstant(FractBits - 32, SL, MVT::i32),
2444 DAG.getConstant(ExpBits, SL, MVT::i32));
2445 SDValue Exp = DAG.getNode(ISD::SUB, SL, MVT::i32, ExpPart,
2446 DAG.getConstant(1023, SL, MVT::i32));
2452 SDLoc SL(Op);
2457 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
2463 SDValue Exp = extractF64Exponent(Hi, SL, DAG);
2468 const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, SL, MVT::i32);
2469 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask);
2472 SDValue SignBit64 = DAG.getBuildVector(MVT::v2i32, SL, {Zero, SignBit});
2473 SignBit64 = DAG.getNode(ISD::BITCAST, SL, MVT::i64, SignBit64);
2475 SDValue BcInt = DAG.getNode(ISD::BITCAST, SL, MVT::i64, Src);
2477 = DAG.getConstant((UINT64_C(1) << FractBits) - 1, SL, MVT::i64);
2479 SDValue Shr = DAG.getNode(ISD::SRA, SL, MVT::i64, FractMask, Exp);
2480 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64);
2481 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, BcInt, Not);
2486 const SDValue FiftyOne = DAG.getConstant(FractBits - 1, SL, MVT::i32);
2488 SDValue ExpLt0 = DAG.getSetCC(SL, SetCCVT, Exp, Zero, ISD::SETLT);
2489 SDValue ExpGt51 = DAG.getSetCC(SL, SetCCVT, Exp, FiftyOne, ISD::SETGT);
2491 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0);
2492 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpGt51, BcInt, Tmp1);
2494 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2);
2499 SDLoc SL(Op);
2505 SDValue C1 = DAG.getConstantFP(C1Val, SL, MVT::f64);
2506 SDValue CopySign = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, C1, Src);
2510 SDValue Tmp1 = DAG.getNode(ISD::FADD, SL, MVT::f64, Src, CopySign);
2511 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign);
2513 SDValue Fabs = DAG.getNode(ISD::FABS, SL, MVT::f64, Src);
2516 SDValue C2 = DAG.getConstantFP(C2Val, SL, MVT::f64);
2520 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT);
2522 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2);
2546 SDLoc SL(Op);
2550 SDValue T = DAG.getNode(ISD::FTRUNC, SL, VT, X);
2554 SDValue Diff = DAG.getNode(ISD::FSUB, SL, VT, X, T);
2556 SDValue AbsDiff = DAG.getNode(ISD::FABS, SL, VT, Diff);
2558 const SDValue Zero = DAG.getConstantFP(0.0, SL, VT);
2559 const SDValue One = DAG.getConstantFP(1.0, SL, VT);
2564 const SDValue Half = DAG.getConstantFP(0.5, SL, VT);
2565 SDValue Cmp = DAG.getSetCC(SL, SetCCVT, AbsDiff, Half, ISD::SETOGE);
2566 SDValue OneOrZeroFP = DAG.getNode(ISD::SELECT, SL, VT, Cmp, One, Zero);
2568 SDValue SignedOffset = DAG.getNode(ISD::FCOPYSIGN, SL, VT, OneOrZeroFP, X);
2569 return DAG.getNode(ISD::FADD, SL, VT, T, SignedOffset);
2573 SDLoc SL(Op);
2580 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src);
2582 const SDValue Zero = DAG.getConstantFP(0.0, SL, MVT::f64);
2583 const SDValue NegOne = DAG.getConstantFP(-1.0, SL, MVT::f64);
2588 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOLT);
2589 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE);
2590 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc);
2592 SDValue Add = DAG.getNode(ISD::SELECT, SL, MVT::f64, And, NegOne, Zero);
2594 return DAG.getNode(ISD::FADD, SL, MVT::f64, Trunc, Add);
2641 SDLoc SL(Src);
2645 DAG.getConstantFP(APFloat::getSmallestNormalized(Semantics), SL, VT);
2650 SL, getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT), Src,
2658 SDLoc SL(Src);
2661 SDValue Inf = DAG.getConstantFP(APFloat::getInf(Semantics), SL, VT);
2663 SDValue Fabs = DAG.getNode(ISD::FABS, SL, VT, Src, Flags);
2665 SL, getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT), Fabs,
2673 AMDGPUTargetLowering::getScaledLogInput(SelectionDAG &DAG, const SDLoc SL,
2681 DAG.getConstantFP(APFloat::getSmallestNormalized(Semantics), SL, VT);
2684 SL, getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT), Src,
2687 SDValue Scale32 = DAG.getConstantFP(0x1.0p+32, SL, VT);
2688 SDValue One = DAG.getConstantFP(1.0, SL, VT);
2690 DAG.getNode(ISD::SELECT, SL, VT, IsLtSmallestNormal, Scale32, One, Flags);
2692 SDValue ScaledInput = DAG.getNode(ISD::FMUL, SL, VT, Src, ScaleFactor, Flags);
2703 SDLoc SL(Op);
2711 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src, Flags);
2712 SDValue Log = DAG.getNode(AMDGPUISD::LOG, SL, MVT::f32, Ext, Flags);
2713 return DAG.getNode(ISD::FP_ROUND, SL, VT, Log,
2714 DAG.getTargetConstant(0, SL, MVT::i32), Flags);
2718 getScaledLogInput(DAG, SL, Src, Flags);
2720 return DAG.getNode(AMDGPUISD::LOG, SL, VT, Src, Flags);
2722 SDValue Log2 = DAG.getNode(AMDGPUISD::LOG, SL, VT, ScaledInput, Flags);
2724 SDValue ThirtyTwo = DAG.getConstantFP(32.0, SL, VT);
2725 SDValue Zero = DAG.getConstantFP(0.0, SL, VT);
2727 DAG.getNode(ISD::SELECT, SL, VT, IsLtSmallestNormal, ThirtyTwo, Zero);
2728 return DAG.getNode(ISD::FSUB, SL, VT, Log2, ResultOffset, Flags);
2731 static SDValue getMad(SelectionDAG &DAG, const SDLoc &SL, EVT VT, SDValue X,
2733 SDValue Mul = DAG.getNode(ISD::FMUL, SL, VT, X, Y, Flags);
2734 return DAG.getNode(ISD::FADD, SL, VT, Mul, C, Flags);
2840 SDValue AMDGPUTargetLowering::LowerFLOGUnsafe(SDValue Src, const SDLoc &SL,
2851 auto [ScaledInput, IsScaled] = getScaledLogInput(DAG, SL, Src, Flags);
2853 SDValue LogSrc = DAG.getNode(AMDGPUISD::LOG, SL, VT, ScaledInput, Flags);
2855 DAG.getConstantFP(-32.0 * Log2BaseInverted, SL, VT);
2857 SDValue Zero = DAG.getConstantFP(0.0f, SL, VT);
2859 SDValue ResultOffset = DAG.getNode(ISD::SELECT, SL, VT, IsScaled,
2862 SDValue Log2Inv = DAG.getConstantFP(Log2BaseInverted, SL, VT);
2865 return DAG.getNode(ISD::FMA, SL, VT, LogSrc, Log2Inv, ResultOffset,
2867 SDValue Mul = DAG.getNode(ISD::FMUL, SL, VT, LogSrc, Log2Inv, Flags);
2868 return DAG.getNode(ISD::FADD, SL, VT, Mul, ResultOffset);
2872 SDValue Log2Operand = DAG.getNode(LogOp, SL, VT, Src, Flags);
2873 SDValue Log2BaseInvertedOperand = DAG.getConstantFP(Log2BaseInverted, SL, VT);
2875 return DAG.getNode(ISD::FMUL, SL, VT, Log2Operand, Log2BaseInvertedOperand,
2883 SDLoc SL(Op);
2891 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src, Flags);
2892 SDValue Log = DAG.getNode(AMDGPUISD::EXP, SL, MVT::f32, Ext, Flags);
2893 return DAG.getNode(ISD::FP_ROUND, SL, VT, Log,
2894 DAG.getTargetConstant(0, SL, MVT::i32), Flags);
2900 return DAG.getNode(AMDGPUISD::EXP, SL, MVT::f32, Src, Flags);
2906 SDValue RangeCheckConst = DAG.getConstantFP(-0x1.f80000p+6f, SL, VT);
2911 DAG.getSetCC(SL, SetCCVT, Src, RangeCheckConst, ISD::SETOLT);
2913 SDValue SixtyFour = DAG.getConstantFP(0x1.0p+6f, SL, VT);
2914 SDValue Zero = DAG.getConstantFP(0.0, SL, VT);
2917 DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, SixtyFour, Zero);
2919 SDValue AddInput = DAG.getNode(ISD::FADD, SL, VT, Src, AddOffset, Flags);
2920 SDValue Exp2 = DAG.getNode(AMDGPUISD::EXP, SL, VT, AddInput, Flags);
2922 SDValue TwoExpNeg64 = DAG.getConstantFP(0x1.0p-64f, SL, VT);
2923 SDValue One = DAG.getConstantFP(1.0, SL, VT);
2925 DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, TwoExpNeg64, One);
2927 return DAG.getNode(ISD::FMUL, SL, VT, Exp2, ResultScale, Flags);
2930 SDValue AMDGPUTargetLowering::lowerFEXPUnsafe(SDValue X, const SDLoc &SL,
2934 const SDValue Log2E = DAG.getConstantFP(numbers::log2e, SL, VT);
2938 SDValue Mul = DAG.getNode(ISD::FMUL, SL, VT, X, Log2E, Flags);
2941 SL, VT, Mul, Flags);
2946 SDValue Threshold = DAG.getConstantFP(-0x1.5d58a0p+6f, SL, VT);
2947 SDValue NeedsScaling = DAG.getSetCC(SL, SetCCVT, X, Threshold, ISD::SETOLT);
2949 SDValue ScaleOffset = DAG.getConstantFP(0x1.0p+6f, SL, VT);
2951 SDValue ScaledX = DAG.getNode(ISD::FADD, SL, VT, X, ScaleOffset, Flags);
2954 DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, ScaledX, X);
2956 SDValue ExpInput = DAG.getNode(ISD::FMUL, SL, VT, AdjustedX, Log2E, Flags);
2958 SDValue Exp2 = DAG.getNode(AMDGPUISD::EXP, SL, VT, ExpInput, Flags);
2960 SDValue ResultScaleFactor = DAG.getConstantFP(0x1.969d48p-93f, SL, VT);
2962 DAG.getNode(ISD::FMUL, SL, VT, Exp2, ResultScaleFactor, Flags);
2964 return DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, AdjustedResult, Exp2,
2970 SDValue AMDGPUTargetLowering::lowerFEXP10Unsafe(SDValue X, const SDLoc &SL,
2978 SDValue K0 = DAG.getConstantFP(0x1.a92000p+1f, SL, VT);
2979 SDValue K1 = DAG.getConstantFP(0x1.4f0978p-11f, SL, VT);
2981 SDValue Mul0 = DAG.getNode(ISD::FMUL, SL, VT, X, K0, Flags);
2982 SDValue Exp2_0 = DAG.getNode(Exp2Op, SL, VT, Mul0, Flags);
2983 SDValue Mul1 = DAG.getNode(ISD::FMUL, SL, VT, X, K1, Flags);
2984 SDValue Exp2_1 = DAG.getNode(Exp2Op, SL, VT, Mul1, Flags);
2985 return DAG.getNode(ISD::FMUL, SL, VT, Exp2_0, Exp2_1);
2996 SDValue Threshold = DAG.getConstantFP(-0x1.2f7030p+5f, SL, VT);
2997 SDValue NeedsScaling = DAG.getSetCC(SL, SetCCVT, X, Threshold, ISD::SETOLT);
2999 SDValue ScaleOffset = DAG.getConstantFP(0x1.0p+5f, SL, VT);
3000 SDValue ScaledX = DAG.getNode(ISD::FADD, SL, VT, X, ScaleOffset, Flags);
3002 DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, ScaledX, X);
3004 SDValue K0 = DAG.getConstantFP(0x1.a92000p+1f, SL, VT);
3005 SDValue K1 = DAG.getConstantFP(0x1.4f0978p-11f, SL, VT);
3007 SDValue Mul0 = DAG.getNode(ISD::FMUL, SL, VT, AdjustedX, K0, Flags);
3008 SDValue Exp2_0 = DAG.getNode(Exp2Op, SL, VT, Mul0, Flags);
3009 SDValue Mul1 = DAG.getNode(ISD::FMUL, SL, VT, AdjustedX, K1, Flags);
3010 SDValue Exp2_1 = DAG.getNode(Exp2Op, SL, VT, Mul1, Flags);
3012 SDValue MulExps = DAG.getNode(ISD::FMUL, SL, VT, Exp2_0, Exp2_1, Flags);
3014 SDValue ResultScaleFactor = DAG.getConstantFP(0x1.9f623ep-107f, SL, VT);
3016 DAG.getNode(ISD::FMUL, SL, VT, MulExps, ResultScaleFactor, Flags);
3018 return DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, AdjustedResult, MulExps,
3024 SDLoc SL(Op);
3032 return lowerFEXPUnsafe(X, SL, DAG, Flags);
3041 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, X, Flags);
3042 SDValue Lowered = lowerFEXPUnsafe(Ext, SL, DAG, Flags);
3043 return DAG.getNode(ISD::FP_ROUND, SL, VT, Lowered,
3044 DAG.getTargetConstant(0, SL, MVT::i32), Flags);
3052 return IsExp10 ? lowerFEXP10Unsafe(X, SL, DAG, Flags)
3053 : lowerFEXPUnsafe(X, SL, DAG, Flags);
3090 SDValue C = DAG.getConstantFP(IsExp10 ? c_exp10 : c_exp, SL, VT);
3091 SDValue CC = DAG.getConstantFP(IsExp10 ? cc_exp10 : cc_exp, SL, VT);
3093 PH = DAG.getNode(ISD::FMUL, SL, VT, X, C, Flags);
3094 SDValue NegPH = DAG.getNode(ISD::FNEG, SL, VT, PH, Flags);
3095 SDValue FMA0 = DAG.getNode(ISD::FMA, SL, VT, X, C, NegPH, Flags);
3096 PL = DAG.getNode(ISD::FMA, SL, VT, X, CC, FMA0, Flags);
3104 SDValue CH = DAG.getConstantFP(IsExp10 ? ch_exp10 : ch_exp, SL, VT);
3105 SDValue CL = DAG.getConstantFP(IsExp10 ? cl_exp10 : cl_exp, SL, VT);
3107 SDValue XAsInt = DAG.getNode(ISD::BITCAST, SL, MVT::i32, X);
3108 SDValue MaskConst = DAG.getConstant(0xfffff000, SL, MVT::i32);
3109 SDValue XHAsInt = DAG.getNode(ISD::AND, SL, MVT::i32, XAsInt, MaskConst);
3110 SDValue XH = DAG.getNode(ISD::BITCAST, SL, VT, XHAsInt);
3111 SDValue XL = DAG.getNode(ISD::FSUB, SL, VT, X, XH, Flags);
3113 PH = DAG.getNode(ISD::FMUL, SL, VT, XH, CH, Flags);
3115 SDValue XLCL = DAG.getNode(ISD::FMUL, SL, VT, XL, CL, Flags);
3116 SDValue Mad0 = getMad(DAG, SL, VT, XL, CH, XLCL, Flags);
3117 PL = getMad(DAG, SL, VT, XH, CL, Mad0, Flags);
3120 SDValue E = DAG.getNode(ISD::FROUNDEVEN, SL, VT, PH, Flags);
3123 SDValue PHSubE = DAG.getNode(ISD::FSUB, SL, VT, PH, E, FlagsNoContract);
3125 SDValue A = DAG.getNode(ISD::FADD, SL, VT, PHSubE, PL, Flags);
3126 SDValue IntE = DAG.getNode(ISD::FP_TO_SINT, SL, MVT::i32, E);
3127 SDValue Exp2 = DAG.getNode(AMDGPUISD::EXP, SL, VT, A, Flags);
3129 SDValue R = DAG.getNode(ISD::FLDEXP, SL, VT, Exp2, IntE, Flags);
3132 DAG.getConstantFP(IsExp10 ? -0x1.66d3e8p+5f : -0x1.9d1da0p+6f, SL, VT);
3135 SDValue Zero = DAG.getConstantFP(0.0, SL, VT);
3137 DAG.getSetCC(SL, SetCCVT, X, UnderflowCheckConst, ISD::SETOLT);
3139 R = DAG.getNode(ISD::SELECT, SL, VT, Underflow, Zero, R);
3144 DAG.getConstantFP(IsExp10 ? 0x1.344136p+5f : 0x1.62e430p+6f, SL, VT);
3146 DAG.getSetCC(SL, SetCCVT, X, OverflowCheckConst, ISD::SETOGT);
3148 DAG.getConstantFP(APFloat::getInf(APFloat::IEEEsingle()), SL, VT);
3149 R = DAG.getNode(ISD::SELECT, SL, VT, Overflow, Inf, R);
3165 auto SL = SDLoc(Op);
3177 SDValue NumExtBits = DAG.getConstant(32u - NumBits, SL, MVT::i32);
3181 NewOp = DAG.getNode(ISD::ANY_EXTEND, SL, MVT::i32, Arg);
3182 NewOp = DAG.getNode(ISD::SHL, SL, MVT::i32, NewOp, NumExtBits);
3183 NewOp = DAG.getNode(Opc, SL, MVT::i32, NewOp);
3185 NewOp = DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i32, Arg);
3186 NewOp = DAG.getNode(Opc, SL, MVT::i32, NewOp);
3187 NewOp = DAG.getNode(ISD::SUB, SL, MVT::i32, NewOp, NumExtBits);
3190 return DAG.getNode(ISD::TRUNCATE, SL, ResultVT, NewOp);
3194 SDLoc SL(Op);
3216 SDValue NewOpr = DAG.getNode(NewOpc, SL, MVT::i32, Src);
3219 Op.getValueType().getScalarSizeInBits(), SL, MVT::i32);
3220 NewOpr = DAG.getNode(ISD::UMIN, SL, MVT::i32, NewOpr, ConstVal);
3222 return DAG.getNode(ISD::ZERO_EXTEND, SL, Src.getValueType(), NewOpr);
3228 SDValue OprLo = DAG.getNode(NewOpc, SL, MVT::i32, Lo);
3229 SDValue OprHi = DAG.getNode(NewOpc, SL, MVT::i32, Hi);
3237 const SDValue Const32 = DAG.getConstant(32, SL, MVT::i32);
3239 OprLo = DAG.getNode(AddOpc, SL, MVT::i32, OprLo, Const32);
3241 OprHi = DAG.getNode(AddOpc, SL, MVT::i32, OprHi, Const32);
3244 NewOpr = DAG.getNode(ISD::UMIN, SL, MVT::i32, OprLo, OprHi);
3246 const SDValue Const64 = DAG.getConstant(64, SL, MVT::i32);
3247 NewOpr = DAG.getNode(ISD::UMIN, SL, MVT::i32, NewOpr, Const64);
3250 return DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i64, NewOpr);
3281 SDLoc SL(Op);
3311 ISD::SRA, SL, MVT::i32, DAG.getNode(ISD::XOR, SL, MVT::i32, Lo, Hi),
3312 DAG.getConstant(31, SL, MVT::i32));
3314 DAG.getNode(ISD::ADD, SL, MVT::i32, DAG.getConstant(32, SL, MVT::i32),
3317 ShAmt = DAG.getNode(AMDGPUISD::FFBH_I32, SL, MVT::i32, Hi);
3320 ShAmt = DAG.getNode(ISD::SUB, SL, MVT::i32, ShAmt,
3321 DAG.getConstant(1, SL, MVT::i32));
3322 ShAmt = DAG.getNode(ISD::UMIN, SL, MVT::i32, ShAmt, MaxShAmt);
3327 Sign = DAG.getNode(ISD::SRA, SL, MVT::i64, Src,
3328 DAG.getConstant(63, SL, MVT::i64));
3330 DAG.getNode(ISD::XOR, SL, MVT::i64,
3331 DAG.getNode(ISD::ADD, SL, MVT::i64, Src, Sign), Sign);
3335 ShAmt = DAG.getNode(ISD::CTLZ, SL, MVT::i32, Hi);
3339 SDValue Norm = DAG.getNode(ISD::SHL, SL, MVT::i64, Src, ShAmt);
3344 SDValue Adjust = DAG.getNode(ISD::UMIN, SL, MVT::i32,
3345 DAG.getConstant(1, SL, MVT::i32), Lo);
3347 Norm = DAG.getNode(ISD::OR, SL, MVT::i32, Hi, Adjust);
3351 SDValue FVal = DAG.getNode(Opc, SL, MVT::f32, Norm);
3355 ShAmt = DAG.getNode(ISD::SUB, SL, MVT::i32, DAG.getConstant(32, SL, MVT::i32),
3359 return DAG.getNode(ISD::FLDEXP, SL, MVT::f32, FVal, ShAmt);
3364 SDValue Exp = DAG.getNode(ISD::SHL, SL, MVT::i32, ShAmt,
3365 DAG.getConstant(23, SL, MVT::i32));
3367 DAG.getNode(ISD::ADD, SL, MVT::i32,
3368 DAG.getNode(ISD::BITCAST, SL, MVT::i32, FVal), Exp);
3371 Sign = DAG.getNode(ISD::SHL, SL, MVT::i32,
3372 DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, Sign),
3373 DAG.getConstant(31, SL, MVT::i32));
3374 IVal = DAG.getNode(ISD::OR, SL, MVT::i32, IVal, Sign);
3376 return DAG.getNode(ISD::BITCAST, SL, MVT::f32, IVal);
3381 SDLoc SL(Op);
3388 SL, MVT::f64, Hi);
3390 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo);
3392 SDValue LdExp = DAG.getNode(ISD::FLDEXP, SL, MVT::f64, CvtHi,
3393 DAG.getConstant(32, SL, MVT::i32));
3395 return DAG.getNode(ISD::FADD, SL, MVT::f64, LdExp, CvtLo);
3416 SDLoc SL(Op);
3417 SDValue ToF32 = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f32, Src);
3418 SDValue FPRoundFlag = DAG.getIntPtrConstant(0, SL, /*isTarget=*/true);
3419 return DAG.getNode(ISD::FP_ROUND, SL, MVT::bf16, ToF32, FPRoundFlag);
3462 SDLoc SL(Op);
3463 SDValue ToF32 = DAG.getNode(ISD::SINT_TO_FP, SL, MVT::f32, Src);
3464 SDValue FPRoundFlag = DAG.getIntPtrConstant(0, SL, /*isTarget=*/true);
3465 return DAG.getNode(ISD::FP_ROUND, SL, MVT::bf16, ToF32, FPRoundFlag);
3495 SDLoc SL(Op);
3511 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, SrcVT, Src);
3519 Sign = DAG.getNode(ISD::SRA, SL, MVT::i32,
3520 DAG.getNode(ISD::BITCAST, SL, MVT::i32, Trunc),
3521 DAG.getConstant(31, SL, MVT::i32));
3522 Trunc = DAG.getNode(ISD::FABS, SL, SrcVT, Trunc);
3528 llvm::bit_cast<double>(UINT64_C(/*2^-32*/ 0x3df0000000000000)), SL,
3531 llvm::bit_cast<double>(UINT64_C(/*-2^32*/ 0xc1f0000000000000)), SL,
3535 llvm::bit_cast<float>(UINT32_C(/*2^-32*/ 0x2f800000)), SL, SrcVT);
3537 llvm::bit_cast<float>(UINT32_C(/*-2^32*/ 0xcf800000)), SL, SrcVT);
3540 SDValue Mul = DAG.getNode(ISD::FMUL, SL, SrcVT, Trunc, K0);
3542 SDValue FloorMul = DAG.getNode(ISD::FFLOOR, SL, SrcVT, Mul);
3544 SDValue Fma = DAG.getNode(ISD::FMA, SL, SrcVT, FloorMul, K1, Trunc);
3548 SL, MVT::i32, FloorMul);
3549 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma);
3551 SDValue Result = DAG.getNode(ISD::BITCAST, SL, MVT::i64,
3552 DAG.getBuildVector(MVT::v2i32, SL, {Lo, Hi}));
3557 Sign = DAG.getNode(ISD::BITCAST, SL, MVT::i64,
3558 DAG.getBuildVector(MVT::v2i32, SL, {Sign, Sign}));
3561 DAG.getNode(ISD::SUB, SL, MVT::i64,
3562 DAG.getNode(ISD::XOR, SL, MVT::i64, Result, Sign), Sign);
3857 SDLoc SL(N);
3891 = DAG.getLoad(NewVT, SL, LN->getChain(),
3894 SDValue BC = DAG.getNode(ISD::BITCAST, SL, VT, NewLoad);
3913 SDLoc SL(N);
3945 SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, NewVT, Val);
3947 SDValue CastBack = DAG.getNode(ISD::BITCAST, SL, VT, CastVal);
3951 return DAG.getStore(SN->getChain(), SL, CastVal,
3968 SDLoc SL(N);
3973 SDValue NewInReg = DAG.getNode(N->getOpcode(), SL, SrcVT, Src, N1);
3974 return DAG.getNode(ISD::TRUNCATE, SL, N->getValueType(0), NewInReg);
4018 DAGCombinerInfo &DCI, const SDLoc &SL,
4025 SDValue LoRHS = DAG.getConstant(ValLo, SL, MVT::i32);
4026 SDValue HiRHS = DAG.getConstant(ValHi, SL, MVT::i32);
4028 SDValue LoAnd = DAG.getNode(Opc, SL, MVT::i32, Lo, LoRHS);
4029 SDValue HiAnd = DAG.getNode(Opc, SL, MVT::i32, Hi, HiRHS);
4036 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {LoAnd, HiAnd});
4037 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec);
4053 SDLoc SL(N);
4068 SDValue Vec = DAG.getBuildVector(MVT::v2i16, SL,
4069 { DAG.getConstant(0, SL, MVT::i16), LHS->getOperand(0) });
4070 return DAG.getNode(ISD::BITCAST, SL, MVT::i32, Vec);
4081 SDValue Shl = DAG.getNode(ISD::SHL, SL, XVT, X, SDValue(RHS, 0));
4082 return DAG.getZExtOrTrunc(Shl, SL, VT);
4097 SDValue ShiftAmt = DAG.getConstant(RHSVal - 32, SL, MVT::i32);
4099 SDValue Lo = DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, LHS);
4100 SDValue NewShift = DAG.getNode(ISD::SHL, SL, MVT::i32, Lo, ShiftAmt);
4102 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
4104 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {Zero, NewShift});
4105 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec);
4118 SDLoc SL(N);
4124 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi,
4125 DAG.getConstant(31, SL, MVT::i32));
4127 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {Hi, NewShift});
4128 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec);
4134 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi,
4135 DAG.getConstant(31, SL, MVT::i32));
4136 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, NewShift});
4137 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec);
4153 SDLoc SL(N);
4163 ISD::AND, SL, VT,
4164 DAG.getNode(ISD::SRL, SL, VT, LHS.getOperand(0), N->getOperand(1)),
4165 DAG.getNode(ISD::SRL, SL, VT, LHS.getOperand(1), N->getOperand(1)));
4179 SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
4183 SDValue NewConst = DAG.getConstant(ShiftAmt - 32, SL, MVT::i32);
4184 SDValue NewShift = DAG.getNode(ISD::SRL, SL, MVT::i32, Hi, NewConst);
4186 SDValue BuildPair = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, Zero});
4188 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildPair);
4193 SDLoc SL(N);
4206 Elt0 = DAG.getNode(ISD::BITCAST, SL,
4210 return DAG.getNode(ISD::TRUNCATE, SL, VT, Elt0);
4227 SrcElt = DAG.getNode(ISD::BITCAST, SL,
4231 return DAG.getNode(ISD::TRUNCATE, SL, VT, SrcElt);
4262 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, MidVT,
4267 Amt = DAG.getZExtOrTrunc(Amt, SL, NewShiftVT);
4271 SDValue ShrunkShift = DAG.getNode(Src.getOpcode(), SL, MidVT,
4273 return DAG.getNode(ISD::TRUNCATE, SL, VT, ShrunkShift);
4285 static SDValue getMul24(SelectionDAG &DAG, const SDLoc &SL,
4289 return DAG.getNode(MulOpc, SL, MVT::i32, N0, N1);
4295 SDValue MulLo = DAG.getNode(MulLoOpc, SL, MVT::i32, N0, N1);
4296 SDValue MulHi = DAG.getNode(MulHiOpc, SL, MVT::i32, N0, N1);
4298 return DAG.getNode(ISD::BUILD_PAIR, SL, MVT::i64, MulLo, MulHi);
4537 SDValue AMDGPUTargetLowering::performCtlz_CttzCombine(const SDLoc &SL, SDValue Cond,
4554 return getFFBX_U32(DAG, CmpLHS, SL, Opc);
4565 return getFFBX_U32(DAG, CmpLHS, SL, Opc);
4573 const SDLoc &SL,
4580 SDValue NewSelect = DAG.getNode(ISD::SELECT, SL, VT, Cond,
4583 return DAG.getNode(Op, SL, VT, NewSelect);
4621 SDLoc SL(N);
4656 NewRHS = DAG.getNode(ISD::FNEG, SL, VT, RHS);
4661 SDValue NewSelect = DAG.getNode(ISD::SELECT, SL, VT,
4664 return DAG.getNode(LHS.getOpcode(), SL, VT, NewSelect);
4696 SDLoc SL(N);
4700 SDValue NewCond = DAG.getSetCC(SL, Cond.getValueType(), LHS, RHS, NewCC);
4701 return DAG.getNode(ISD::SELECT, SL, VT, NewCond, False, True);
4807 SDLoc SL(N);
4818 LHS = DAG.getNode(ISD::FNEG, SL, VT, LHS);
4823 RHS = DAG.getNode(ISD::FNEG, SL, VT, RHS);
4827 SDValue Res = DAG.getNode(ISD::FADD, SL, VT, LHS, RHS, N0->getFlags());
4831 DAG.ReplaceAllUsesWith(N0, DAG.getNode(ISD::FNEG, SL, VT, Res));
4846 RHS = DAG.getNode(ISD::FNEG, SL, VT, RHS);
4848 SDValue Res = DAG.getNode(Opc, SL, VT, LHS, RHS, N0->getFlags());
4852 DAG.ReplaceAllUsesWith(N0, DAG.getNode(ISD::FNEG, SL, VT, Res));
4871 MHS = DAG.getNode(ISD::FNEG, SL, VT, MHS);
4874 RHS = DAG.getNode(ISD::FNEG, SL, VT, RHS);
4878 SDValue Res = DAG.getNode(Opc, SL, VT, LHS, MHS, RHS);
4882 DAG.ReplaceAllUsesWith(N0, DAG.getNode(ISD::FNEG, SL, VT, Res));
4906 SDValue NegLHS = DAG.getNode(ISD::FNEG, SL, VT, LHS);
4907 SDValue NegRHS = DAG.getNode(ISD::FNEG, SL, VT, RHS);
4910 SDValue Res = DAG.getNode(Opposite, SL, VT, NegLHS, NegRHS, N0->getFlags());
4914 DAG.ReplaceAllUsesWith(N0, DAG.getNode(ISD::FNEG, SL, VT, Res));
4920 Ops[I] = DAG.getNode(ISD::FNEG, SL, VT, N0->getOperand(I), N0->getFlags());
4922 SDValue Res = DAG.getNode(AMDGPUISD::FMED3, SL, VT, Ops, N0->getFlags());
4927 SDValue Neg = DAG.getNode(ISD::FNEG, SL, VT, Res);
4951 return DAG.getNode(Opc, SL, VT, CvtSrc.getOperand(0));
4959 SDValue Neg = DAG.getNode(ISD::FNEG, SL, CvtSrc.getValueType(), CvtSrc);
4960 return DAG.getNode(Opc, SL, VT, Neg, N0->getFlags());
4967 return DAG.getNode(ISD::FP_ROUND, SL, VT,
4975 SDValue Neg = DAG.getNode(ISD::FNEG, SL, CvtSrc.getValueType(), CvtSrc);
4976 return DAG.getNode(ISD::FP_ROUND, SL, VT, Neg, N0.getOperand(1));
4982 SDLoc SL(N);
4988 SDValue IntFNeg = DAG.getNode(ISD::XOR, SL, SrcVT, Src,
4989 DAG.getConstant(0x8000, SL, SrcVT));
4990 return DAG.getNode(ISD::FP16_TO_FP, SL, N->getValueType(0), IntFNeg);
4998 SDLoc SL(N);
5015 SDValue CastHi = DAG.getNode(ISD::BITCAST, SL, MVT::f32, HighBits);
5016 SDValue NegHi = DAG.getNode(ISD::FNEG, SL, MVT::f32, CastHi);
5018 DAG.getNode(ISD::BITCAST, SL, HighBits.getValueType(), NegHi);
5024 DAG.getNode(ISD::BUILD_VECTOR, SL, BCSrc.getValueType(), Ops);
5025 SDValue Result = DAG.getNode(ISD::BITCAST, SL, VT, Build);
5028 DAG.ReplaceAllUsesWith(N0, DAG.getNode(ISD::FNEG, SL, VT, Result));
5040 DAG.getNode(ISD::BITCAST, SL, MVT::f32, BCSrc.getOperand(1));
5042 DAG.getNode(ISD::BITCAST, SL, MVT::f32, BCSrc.getOperand(2));
5044 SDValue NegLHS = DAG.getNode(ISD::FNEG, SL, MVT::f32, LHS);
5045 SDValue NegRHS = DAG.getNode(ISD::FNEG, SL, MVT::f32, RHS);
5047 return DAG.getNode(ISD::SELECT, SL, MVT::f32, BCSrc.getOperand(0), NegLHS,
5069 SDLoc SL(N);
5074 SDValue IntFAbs = DAG.getNode(ISD::AND, SL, SrcVT, Src,
5075 DAG.getConstant(0x7fff, SL, SrcVT));
5076 return DAG.getNode(ISD::FP16_TO_FP, SL, N->getValueType(0), IntFAbs);
5123 SDLoc SL(N);
5129 return DAG.getBuildVector(DestVT, SL, CastedElts);
5143 SDLoc SL(N);
5145 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32,
5146 DAG.getConstant(Lo_32(CVal), SL, MVT::i32),
5147 DAG.getConstant(Hi_32(CVal), SL, MVT::i32));
5148 return DAG.getNode(ISD::BITCAST, SL, DestVT, BV);
5153 SDLoc SL(N);
5155 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32,
5156 DAG.getConstant(Lo_32(CVal), SL, MVT::i32),
5157 DAG.getConstant(Hi_32(CVal), SL, MVT::i32));
5159 return DAG.getNode(ISD::BITCAST, SL, DestVT, Vec);
5345 const SDLoc &SL,
5361 return DAG.getCopyFromReg(DAG.getEntryNode(), SL, VReg, VT);
5380 const SDLoc &SL,
5389 return DAG.getLoad(VT, SL, DAG.getEntryNode(), Ptr, SrcPtrInfo, Align(4),
5395 const SDLoc &SL,
5403 SDValue Ptr = DAG.getConstant(Offset, SL, MVT::i32);
5406 DAG.getCopyFromReg(Chain, SL, Info->getStackPtrOffsetReg(), MVT::i32);
5407 Ptr = DAG.getNode(ISD::ADD, SL, MVT::i32, SP, Ptr);
5408 SDValue Store = DAG.getStore(Chain, SL, ArgVal, Ptr, DstInfo, Align(4),
5415 EVT VT, const SDLoc &SL,
5420 CreateLiveInRegister(DAG, RC, Arg.getRegister(), VT, SL) :
5421 loadStackInputValue(DAG, VT, SL, Arg.getStackOffset());
5428 V = DAG.getNode(ISD::SRL, SL, VT, V,
5429 DAG.getShiftAmountConstant(Shift, VT, SL));
5430 return DAG.getNode(ISD::AND, SL, VT, V,
5431 DAG.getConstant(Mask >> Shift, SL, VT));