Lines Matching defs:SL
1054 SDLoc SL(N);
1075 SDLoc SL(N);
1090 SDLoc SL(N);
1110 SDLoc SL(N);
1119 SDValue Clamp = CurDAG->getTargetConstant(0, SL, MVT::i1);
1128 SDLoc SL(N);
1137 SDValue Zero = CurDAG->getTargetConstant(0, SL, MVT::i64);
1138 SDValue Clamp = CurDAG->getTargetConstant(0, SL, MVT::i1);
1141 Opc, SL, CurDAG->getVTList(MVT::i64, MVT::i1), Ops);
1143 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32);
1144 SDNode *Lo = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, SL,
1149 SDValue Sub1 = CurDAG->getTargetConstant(AMDGPU::sub1, SL, MVT::i32);
1150 SDNode *Hi = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, SL,
1874 SDLoc SL(N);
1884 AMDGPU::V_MOV_B32_e32, SL, MVT::i32,
2044 SDLoc SL(N);
2053 AMDGPU::V_MOV_B32_e32, SL, MVT::i32,
2147 SDLoc SL(ByteOffsetNode);
2155 *Offset = CurDAG->getSignedTargetConstant(*EncodedOffset, SL, MVT::i32);
2165 *Offset = CurDAG->getTargetConstant(*EncodedOffset, SL, MVT::i32);
2173 SDValue C32Bit = CurDAG->getTargetConstant(ByteOffset, SL, MVT::i32);
2175 CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, C32Bit), 0);
2187 SDLoc SL(Addr);
2192 SDValue AddrHi = CurDAG->getTargetConstant(AddrHiVal, SL, MVT::i32);
2195 CurDAG->getTargetConstant(AMDGPU::SReg_64_XEXECRegClassID, SL, MVT::i32),
2197 CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32),
2198 SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, AddrHi),
2200 CurDAG->getTargetConstant(AMDGPU::sub1, SL, MVT::i32),
2203 return SDValue(CurDAG->getMachineNode(AMDGPU::REG_SEQUENCE, SL, MVT::i64,
2577 SDLoc SL(N);
2595 Subtarget->isWave32() ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64, SL,
2604 SDValue VCC = CurDAG->getCopyToReg(N->getOperand(0), SL, CondReg, Cond);
2711 SDLoc SL(N);
2728 glueCopyToM0(N, CurDAG->getTargetConstant(0, SL, MVT::i32));
2740 = CurDAG->getMachineNode(AMDGPU::V_READFIRSTLANE_B32, SL, MVT::i32,
2744 = CurDAG->getMachineNode(AMDGPU::S_LSHL_B32, SL, MVT::i32,
2746 CurDAG->getTargetConstant(16, SL, MVT::i32));
2751 SDValue OffsetField = CurDAG->getTargetConstant(ImmOffset, SL, MVT::i32);
2952 SDLoc SL(N);
2958 Subtarget->getWavefrontSizeLog2(), SL, MVT::i32);
2961 SrcVal = SDValue(CurDAG->getMachineNode(AMDGPU::V_READFIRSTLANE_B32, SL,
2966 CopyVal = SDValue(CurDAG->getMachineNode(AMDGPU::S_LSHL_B32, SL, MVT::i32,
2971 SDValue CopyToSP = CurDAG->getCopyToReg(N->getOperand(0), SL, SP, CopyVal);
3167 SDLoc SL(In);
3169 CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, SL,
3174 CurDAG->getTargetConstant(RC, SL, MVT::i32),
3175 Lo, CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32),
3176 Undef, CurDAG->getTargetConstant(AMDGPU::sub1, SL, MVT::i32) };
3178 Src = SDValue(CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, SL,
3852 SDLoc SL(In);
3853 return CurDAG->getConstant(C->getZExtValue() << 16, SL, MVT::i32);
3857 SDLoc SL(In);
3859 C->getValueAPF().bitcastToAPInt().getZExtValue() << 16, SL, MVT::i32);