Lines Matching defs:Elts

3266 static MachineSDNode *buildRegSequence32(SmallVectorImpl<SDValue> &Elts,
3271   switch (Elts.size()) {
3290   for (unsigned i = 0; i < Elts.size(); ++i) {
3291     Ops.push_back(Elts[i]);
3298 static MachineSDNode *buildRegSequence16(SmallVectorImpl<SDValue> &Elts,
3303          (Elts.size() == 8 || Elts.size() == 16));
3307   for (unsigned i = 0; i < Elts.size(); i += 2) {
3308     SDValue LoSrc = stripExtractLoElt(stripBitcast(Elts[i]));
3310     if (isExtractHiElt(Elts[i + 1], HiSrc) && LoSrc == HiSrc) {
3316                                  {Elts[i + 1], Elts[i], PackLoLo});
3324 static MachineSDNode *buildRegSequence(SmallVectorImpl<SDValue> &Elts,
3328     return buildRegSequence16(Elts, CurDAG, DL);
3330     return buildRegSequence32(Elts, CurDAG, DL);
3335                                  SmallVectorImpl<SDValue> &Elts, SDValue &Src,
3342     for (auto El : Elts) {
3347     if (Elts.size() != NegAbsElts.size()) {
3349       Src = SDValue(buildRegSequence(Elts, CurDAG, DL, ElementSize), 0);
3359     Src = SDValue(buildRegSequence(Elts, CurDAG, DL, ElementSize), 0);