Lines Matching defs:TRANS

77   TRANS = 1u << 10,
79         DS_READ | DS_WRITE | TRANS,
893   // The count of TRANS SUs involved in the interleaved pipeline
899   // The number of transitive MFMA successors for each TRANS SU
901   // The number of transitive TRANS predecessors for each MFMA SU
909   // Whether or not there are instructions between the TRANS instruction and
951   /// \p Number th MFMA of the MFMAs occuring after a TRANS instruction
1291   // Whether the instruction occurs after the first TRANS instruction. This
1292   // implies the instruction can not be a predecessor of the first TRANS
1638       SchedGroupMask::TRANS, ExpRequirement, PipelineSyncID, DAG, TII);
1684         SchedGroupMask::TRANS, 1, PipelineSyncID, DAG, TII);
1701       SchedGroupMask::TRANS, 1, PipelineSyncID, DAG, TII);
1807           SchedGroupMask::TRANS, 1, PipelineSyncID, DAG, TII);
1862         SchedGroupMask::TRANS, 1, PipelineSyncID, DAG, TII);
2454   else if (((SGMask & SchedGroupMask::TRANS) != SchedGroupMask::NONE) &&
2637   // ALU implies VALU, SALU, MFMA, TRANS.
2640                     ~SchedGroupMask::MFMA & ~SchedGroupMask::TRANS;
2641   // VALU, SALU, MFMA, TRANS implies ALU.
2645            (InvertedMask & SchedGroupMask::TRANS) == SchedGroupMask::NONE)