Lines Matching defs:Phase

833       AMDGPU::SchedulingPhase Phase) = 0;
837                                    AMDGPU::SchedulingPhase Phase) = 0;
853       AMDGPU::SchedulingPhase Phase) override;
856                            AMDGPU::SchedulingPhase Phase) override {
869     AMDGPU::SchedulingPhase Phase) {
1323       AMDGPU::SchedulingPhase Phase) override;
1326                            AMDGPU::SchedulingPhase Phase) override;
1528                                                AMDGPU::SchedulingPhase Phase) {
1532   if (Phase != AMDGPU::SchedulingPhase::PostRA)
1534   if (Phase != AMDGPU::SchedulingPhase::PostRA && !analyzeDAG(TII))
1543     AMDGPU::SchedulingPhase Phase) {
1591   bool IsPostRA = Phase == AMDGPU::SchedulingPhase::PostRA;
1836       AMDGPU::SchedulingPhase Phase) override;
1839                            AMDGPU::SchedulingPhase Phase) override {
1852     AMDGPU::SchedulingPhase Phase) {
2066       AMDGPU::SchedulingPhase Phase) override;
2069                            AMDGPU::SchedulingPhase Phase) override {
2086     AMDGPU::SchedulingPhase Phase) {
2090   bool IsInitial = Phase == AMDGPU::SchedulingPhase::Initial;
2188   // Phase 1: Break up DS_READ and MFMA clusters.
2213   // Phase 2a: Loop carried dependency with V_PERM
2250   // Phase 2b: Loop carried dependency without V_PERM
2268   // Phase 2c: Loop carried dependency with V_PERM, VMEM_READs are
2390   AMDGPU::SchedulingPhase Phase = AMDGPU::SchedulingPhase::Initial;
2393   IGroupLPDAGMutation(AMDGPU::SchedulingPhase Phase) : Phase(Phase) {}
2690   if (!S->shouldApplyStrategy(DAG, Phase))
2694   return S->applyIGLPStrategy(SyncedInstrs, SyncedSchedGroups, Phase);
2701 /// \p Phase specifes whether or not this is a reentry into the
2707 createIGroupLPDAGMutation(AMDGPU::SchedulingPhase Phase) {
2708   return std::make_unique<IGroupLPDAGMutation>(Phase);