Lines Matching defs:MFMA

70   MFMA = 1u << 3,
78   ALL = ALU | VALU | SALU | MFMA | VMEM | VMEM_READ | VMEM_WRITE | DS |
247 // {VMEM_READ, VALU, MFMA, VMEM_READ} and we encounter a VMEM_READ instruction
870   // Count the number of MFMA instructions.
884         SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
895   // The count of MFMA SUs involved in the interleaved pipeline
899   // The number of transitive MFMA successors for each TRANS SU
901   // The number of transitive TRANS predecessors for each MFMA SU
903   // The count of independent "chains" of MFMA instructions in the pipeline
905   // The length of each independent "chain" of MFMA instructions
912   // The first occuring DS_READ which feeds an MFMA chain
914   // The MFMAPipe SUs with no MFMA predecessors
920   /// Whether or not the instruction is a transitive predecessor of an MFMA
951   /// \p Number th MFMA of the MFMAs occuring after a TRANS instruction
991   /// Whether or not the instruction enables the exact MFMA that is the \p
992   /// Number th MFMA in the chain starting with \p ChainSeed
1246   /// Whether or not the SU is exactly the \p Number th MFMA in the chain
1366       // Avoid counting a potential bonus V_EXP which all the MFMA depend on
1396   // Count the number of EXPs that reach an MFMA
1486   // The number of bit pack operations an MFMA depends on
1516   // The number of V_EXPs required to resolve all dependencies for an MFMA
1698   // The "extra" EXP which enables all MFMA
1733     // Round N MFMA
1735         SchedGroupMask::MFMA, MFMARatio, PipelineSyncID, DAG, TII);
1825       SchedGroupMask::MFMA, MFMAEnablement * 2, PipelineSyncID, DAG, TII);
1853   // Count the number of MFMA instructions.
1866         SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
1875   // Whether the DS_READ is a predecessor of first four MFMA in region
2178           SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
2188   // Phase 1: Break up DS_READ and MFMA clusters.
2189   // First DS_READ to make ready initial MFMA, then interleave MFMA with DS_READ
2192   // Make ready initial MFMA
2199       SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
2202   // Interleave MFMA with DS_READ prefetch
2209         SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
2215   // depend on. Interleave MFMA to keep XDL unit busy throughout.
2235         SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
2246         SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
2252   // Interleave MFMA to keep XDL unit busy throughout.
2264         SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
2271   // depend on. Interleave MFMA to keep XDL unit busy throughout.
2285         SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
2299         SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
2310         SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
2321         SchedGroupMask::MFMA, 1, PipelineSyncID, DAG, TII);
2424   else if (((SGMask & SchedGroupMask::MFMA) != SchedGroupMask::NONE) &&
2637   // ALU implies VALU, SALU, MFMA, TRANS.
2640                     ~SchedGroupMask::MFMA & ~SchedGroupMask::TRANS;
2641   // VALU, SALU, MFMA, TRANS implies ALU.
2644            (InvertedMask & SchedGroupMask::MFMA) == SchedGroupMask::NONE ||