Lines Matching full:callconv

276                                         CallingConv::ID CallConv,
280   if (AMDGPU::isEntryFunctionCC(CallConv))
285   CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs,
288   return checkReturn(CCInfo, Outs, TLI.CCAssignFnForReturn(CallConv, IsVarArg));
996   CallingConv::ID CalleeCC = Info.CallConv;
1042   CallingConv::ID CalleeCC = Info.CallConv;
1105   CallingConv::ID CalleeCC = Info.CallConv;
1193   CallingConv::ID CalleeCC = Info.CallConv;
1214   if (AMDGPU::isChainCC(Info.CallConv)) {
1279   CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext());
1286   if (Info.CallConv != CallingConv::AMDGPU_Gfx &&
1287       !AMDGPU::isChainCC(Info.CallConv)) {
1362     Info.CallConv = F->getCallingConv();
1366     Info.CallConv = CallingConv::AMDGPU_CS_Chain; // amdgpu_cs_chain_preserve
1381   splitToValueTypes(SGPRArgs, OutArgs, DL, Info.CallConv);
1382   splitToValueTypes(VGPRArgs, OutArgs, DL, Info.CallConv);
1413     splitToValueTypes(OrigArg, OutArgs, DL, Info.CallConv);
1417     splitToValueTypes(Info.OrigRet, InArgs, DL, Info.CallConv);
1437       getAssignFnsForCC(Info.CallConv, TLI);
1446                                Info.CallConv);
1458   const uint32_t *Mask = TRI->getCallPreservedMask(MF, Info.CallConv);
1462   CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext());
1469   if (Info.CallConv != CallingConv::AMDGPU_Gfx) {
1491   handleImplicitCallArguments(MIRBuilder, MIB, ST, *MFI, Info.CallConv,
1517     CCAssignFn *RetAssignFn = TLI.CCAssignFnForReturn(Info.CallConv,
1522                                        Info.CallConv, Info.IsVarArg))