Lines Matching defs:S32

74       LLT S32 = LLT::scalar(32);
75       if (Ty != S32) {
80           ExtReg = MIRBuilder.buildPtrToInt(S32, ExtReg).getReg(0);
82           ExtReg = MIRBuilder.buildBitcast(S32, ExtReg).getReg(0);
198     const LLT S32 = LLT::scalar(32);
225     auto OffsetReg = MIRBuilder.buildConstant(S32, Offset);
873   const LLT S32 = LLT::scalar(32);
885       InputReg = MRI.createGenericVirtualRegister(S32);
889       InputReg = MIRBuilder.buildConstant(S32, 0).getReg(0);
895     Register Y = MRI.createGenericVirtualRegister(S32);
899     Y = MIRBuilder.buildShl(S32, Y, MIRBuilder.buildConstant(S32, 10)).getReg(0);
900     InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Y).getReg(0) : Y;
905     Register Z = MRI.createGenericVirtualRegister(S32);
909     Z = MIRBuilder.buildShl(S32, Z, MIRBuilder.buildConstant(S32, 20)).getReg(0);
910     InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Z).getReg(0) : Z;
915     InputReg = MRI.createGenericVirtualRegister(S32);
929                          &AMDGPU::VGPR_32RegClass, S32);