Lines Matching defs:IRP

321   AAAMDAttributes(const IRPosition &IRP, Attributor &A) : Base(IRP) {}
323   /// Create an abstract attribute view for the position \p IRP.
324   static AAAMDAttributes &createForPosition(const IRPosition &IRP,
347   AAUniformWorkGroupSize(const IRPosition &IRP, Attributor &A) : Base(IRP) {}
349   /// Create an abstract attribute view for the position \p IRP.
350   static AAUniformWorkGroupSize &createForPosition(const IRPosition &IRP,
373   AAUniformWorkGroupSizeFunction(const IRPosition &IRP, Attributor &A)
374       : AAUniformWorkGroupSize(IRP, A) {}
445 AAUniformWorkGroupSize::createForPosition(const IRPosition &IRP,
447   if (IRP.getPositionKind() == IRPosition::IRP_FUNCTION)
448     return *new (A.Allocator) AAUniformWorkGroupSizeFunction(IRP, A);
454   AAAMDAttributesFunction(const IRPosition &IRP, Attributor &A)
455       : AAAMDAttributes(IRP, A) {}
795 AAAMDAttributes &AAAMDAttributes::createForPosition(const IRPosition &IRP,
797   if (IRP.getPositionKind() == IRPosition::IRP_FUNCTION)
798     return *new (A.Allocator) AAAMDAttributesFunction(IRP, A);
809   AAAMDSizeRangeAttribute(const IRPosition &IRP, Attributor &A,
811       : Base(IRP, 32), AttrName(AttrName) {}
885   AAAMDFlatWorkGroupSize(const IRPosition &IRP, Attributor &A)
886       : AAAMDSizeRangeAttribute(IRP, A, "amdgpu-flat-work-group-size") {}
924   /// Create an abstract attribute view for the position \p IRP.
925   static AAAMDFlatWorkGroupSize &createForPosition(const IRPosition &IRP,
956 AAAMDFlatWorkGroupSize::createForPosition(const IRPosition &IRP,
958   if (IRP.getPositionKind() == IRPosition::IRP_FUNCTION)
959     return *new (A.Allocator) AAAMDFlatWorkGroupSize(IRP, A);
1008   AAAMDMaxNumWorkgroups(const IRPosition &IRP, Attributor &A) : Base(IRP) {}
1051   /// Create an abstract attribute view for the position \p IRP.
1052   static AAAMDMaxNumWorkgroups &createForPosition(const IRPosition &IRP,
1097 AAAMDMaxNumWorkgroups::createForPosition(const IRPosition &IRP, Attributor &A) {
1098   if (IRP.getPositionKind() == IRPosition::IRP_FUNCTION)
1099     return *new (A.Allocator) AAAMDMaxNumWorkgroups(IRP, A);
1105   AAAMDWavesPerEU(const IRPosition &IRP, Attributor &A)
1106       : AAAMDSizeRangeAttribute(IRP, A, "amdgpu-waves-per-eu") {}
1190   /// Create an abstract attribute view for the position \p IRP.
1191   static AAAMDWavesPerEU &createForPosition(const IRPosition &IRP,
1219 AAAMDWavesPerEU &AAAMDWavesPerEU::createForPosition(const IRPosition &IRP,
1221   if (IRP.getPositionKind() == IRPosition::IRP_FUNCTION)
1222     return *new (A.Allocator) AAAMDWavesPerEU(IRP, A);
1242   AAAMDGPUNoAGPR(const IRPosition &IRP, Attributor &A) : IRAttribute(IRP) {}
1244   static AAAMDGPUNoAGPR &createForPosition(const IRPosition &IRP,
1246     if (IRP.getPositionKind() == IRPosition::IRP_FUNCTION)
1247       return *new (A.Allocator) AAAMDGPUNoAGPR(IRP, A);