Lines Matching defs:CreateExpr
941 auto CreateExpr = [&Ctx](int64_t Value) {
999 ProgInfo.NumSGPR = CreateExpr(MaxAddressableNumSGPRs - 1);
1076 {ProgInfo.NumSGPR, CreateExpr(WaveDispatchNumSGPR)}, Ctx);
1079 {ProgInfo.NumVGPR, CreateExpr(WaveDispatchNumVGPR)}, Ctx);
1089 CreateExpr(MFI->getNumUserSGPRs()), ExtraSGPRs, Ctx);
1098 AMDGPUMCExpr::createMax({ProgInfo.NumSGPR, CreateExpr(1ul),
1099 CreateExpr(STM.getMinNumSGPRs(MaxWaves))},
1102 AMDGPUMCExpr::createMax({ProgInfo.NumVGPR, CreateExpr(1ul),
1103 CreateExpr(STM.getMinNumVGPRs(MaxWaves))},
1119 ProgInfo.NumSGPR = CreateExpr(MaxAddressableNumSGPRs);
1120 ProgInfo.NumSGPRsForWavesPerEU = CreateExpr(MaxAddressableNumSGPRs);
1126 CreateExpr(AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG);
1128 CreateExpr(AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG);
1149 auto GetNumGPRBlocks = [&CreateExpr, &Ctx](const MCExpr *NumGPR,
1151 const MCExpr *OneConst = CreateExpr(1ul);
1152 const MCExpr *GranuleConst = CreateExpr(Granule);
1213 CreateExpr(STM.getWavefrontSize()), Ctx),
1214 CreateExpr(1ULL << ScratchAlignShift));
1269 SetBits(ProgInfo.ComputePGMRSrc3GFX90A, CreateExpr(ProgInfo.TgSplit),