Lines Matching defs:MIRBuilder

1374   MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
1375 MachineRegisterInfo &MRI = *MIRBuilder.getMRI();
1382 return legalizeVaArg(MI, MRI, MIRBuilder);
1385 return legalizeLoadStore(MI, MRI, MIRBuilder, Observer);
1389 return legalizeShlAshrLshr(MI, MRI, MIRBuilder, Observer);
1391 return legalizeSmallCMGlobalValue(MI, MRI, MIRBuilder, Observer);
1397 return legalizeFunnelShift(MI, MRI, MIRBuilder, Observer, Helper);
1420 return legalizeICMP(MI, MRI, MIRBuilder);
1445 MachineIRBuilder &MIRBuilder,
1478 auto Cast64 = MIRBuilder.buildConstant(LLT::scalar(64), Amount.zext(64));
1488 MIRBuilder.buildInstr(TargetOpcode::G_FSHR, {MI.getOperand(0).getReg()},
1498 MachineIRBuilder &MIRBuilder) const {
1517 MIRBuilder
1520 MIRBuilder.buildNot(DstReg, CmpReg);
1536 auto NewAmt = Helper.MIRBuilder.buildZExt(LLT::scalar(64), AmtReg);
1544 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder,
1567 auto ADRP = MIRBuilder.buildInstr(AArch64::ADRP, {LLT::pointer(0, 64)}, {})
1588 ADRP = MIRBuilder.buildInstr(AArch64::MOVKXi, {LLT::pointer(0, 64)}, {ADRP})
1595 MIRBuilder.buildInstr(AArch64::G_ADD_LOW, {DstReg}, {ADRP})
1637 MachineIRBuilder &MIB = Helper.MIRBuilder;
1787 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder,
1802 auto ExtCst = MIRBuilder.buildConstant(LLT::scalar(64), Amount);
1826 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder,
1868 NewI = MIRBuilder.buildInstr(Opcode, {s64, s64}, {});
1869 MIRBuilder.buildMergeLikeInstr(
1872 auto Split = MIRBuilder.buildUnmerge(s64, MI.getOperand(0));
1873 NewI = MIRBuilder.buildInstr(
1907 auto Bitcast = MIRBuilder.buildBitcast(NewTy, ValReg);
1908 MIRBuilder.buildStore(Bitcast.getReg(0), MI.getOperand(1), MMO);
1910 auto NewLoad = MIRBuilder.buildLoad(NewTy, MI.getOperand(1), MMO);
1911 MIRBuilder.buildBitcast(ValReg, NewLoad);
1919 MachineIRBuilder &MIRBuilder) const {
1920 MachineFunction &MF = MIRBuilder.getMF();
1930 auto List = MIRBuilder.buildLoad(
1939 MIRBuilder.buildConstant(IntPtrTy, Alignment.value() - 1);
1940 auto ListTmp = MIRBuilder.buildPtrAdd(PtrTy, List, AlignMinus1.getReg(0));
1941 DstPtr = MIRBuilder.buildMaskLowPtrBits(PtrTy, ListTmp, Log2(Alignment));
1947 MIRBuilder.buildLoad(
1952 auto Size = MIRBuilder.buildConstant(IntPtrTy, alignTo(ValSize, PtrAlign));
1954 auto NewList = MIRBuilder.buildPtrAdd(PtrTy, DstPtr, Size.getReg(0));
1956 MIRBuilder.buildStore(NewList, ListPtr,
1996 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
2008 auto Split = MIRBuilder.buildUnmerge(s64, Val);
2009 auto CTPOP1 = MIRBuilder.buildCTPOP(s64, Split->getOperand(0));
2010 auto CTPOP2 = MIRBuilder.buildCTPOP(s64, Split->getOperand(1));
2011 auto Add = MIRBuilder.buildAdd(s64, CTPOP1, CTPOP2);
2013 MIRBuilder.buildZExt(Dst, Add);
2033 Val = MIRBuilder.buildZExt(LLT::scalar(64), Val).getReg(0);
2036 Val = MIRBuilder.buildBitcast(VTy, Val).getReg(0);
2039 auto CTPOP = MIRBuilder.buildCTPOP(VTy, Val);
2046 auto Zeros = MIRBuilder.buildConstant(Dt, 0);
2047 auto Ones = MIRBuilder.buildConstant(VTy, 1);
2052 MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP});
2053 Sum = MIRBuilder.buildInstr(AArch64::G_UADDLP, {Ty}, {UDOT});
2055 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP});
2057 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP});
2096 UADD = MIRBuilder.buildIntrinsic(Opc, {HTy}).addUse(HSum);
2102 MIRBuilder.buildZExt(Dst, UADD);
2111 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
2114 auto DesiredI = MIRBuilder.buildUnmerge({s64, s64}, MI.getOperand(2));
2115 auto NewI = MIRBuilder.buildUnmerge({s64, s64}, MI.getOperand(3));
2152 MIRBuilder.buildInstr(TargetOpcode::REG_SEQUENCE, {CASDesired}, {})
2157 MIRBuilder.buildInstr(TargetOpcode::REG_SEQUENCE, {CASNew}, {})
2163 CAS = MIRBuilder.buildInstr(Opcode, {CASDst}, {CASDesired, CASNew, Addr});
2165 MIRBuilder.buildExtract({DstLo}, {CASDst}, 0);
2166 MIRBuilder.buildExtract({DstHi}, {CASDst}, 64);
2190 CAS = MIRBuilder.buildInstr(Opcode, {DstLo, DstHi, Scratch},
2201 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0), {DstLo, DstHi});
2208 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
2209 MachineRegisterInfo &MRI = *MIRBuilder.getMRI();
2211 auto BitReverse = MIRBuilder.buildBitReverse(Ty, MI.getOperand(1));
2212 MIRBuilder.buildCTLZ(MI.getOperand(0).getReg(), BitReverse);
2219 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
2227 MIRBuilder.buildAnyExt(LLT::scalar(64), Value).getReg(0);
2252 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
2253 MachineRegisterInfo &MRI = *MIRBuilder.getMRI();
2279 MIRBuilder.buildInstr(AArch64::PROBED_STACKALLOC_DYN, {}, {SPTmp});
2281 MIRBuilder.setInsertPt(*NewMI->getParent(), NewMI);
2282 MIRBuilder.buildCopy(Dst, SPTmp);
2290 MachineIRBuilder &MIB = Helper.MIRBuilder;