Lines Matching defs:SrcMI
244 MachineInstr *SrcMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg());
245 if (!SrcMI)
258 if (SrcMI->getOpcode() == TargetOpcode::COPY &&
259 SrcMI->getOperand(1).getReg().isVirtual()) {
261 MRI->getRegClass(SrcMI->getOperand(1).getReg());
267 SrcMI->getOperand(1).getSubReg() != AArch64::ssub))
269 Register CpySrc = SrcMI->getOperand(1).getReg();
270 if (SrcMI->getOperand(1).getSubReg() == AArch64::ssub) {
272 BuildMI(*SrcMI->getParent(), SrcMI, SrcMI->getDebugLoc(),
274 .add(SrcMI->getOperand(1));
276 BuildMI(*SrcMI->getParent(), SrcMI, SrcMI->getDebugLoc(),
277 TII->get(AArch64::FMOVSWr), SrcMI->getOperand(0).getReg())
279 SrcMI->eraseFromParent();
281 else if (SrcMI->getOpcode() <= TargetOpcode::GENERIC_OP_END)
327 MachineInstr *SrcMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg());
328 if (!SrcMI)
341 if ((SrcMI->getOpcode() <= TargetOpcode::GENERIC_OP_END) ||
452 MachineInstr &SrcMI = *MRI->getUniqueVRegDef(MI.getOperand(1).getReg());
453 std::optional<UsedNZCV> NZCVUsed = examineCFlagsUse(SrcMI, MI, *TRI);
608 MachineInstr *SrcMI = MRI->getUniqueVRegDef(MI.getOperand(3).getReg());
613 if (!SrcMI || SrcMI->getOpcode() != TargetOpcode::COPY)
616 if (!SrcMI->getOperand(1).getReg().isVirtual())
619 if (MRI->getRegClass(SrcMI->getOperand(1).getReg()) ==
623 SrcMI = MRI->getUniqueVRegDef(SrcMI->getOperand(1).getReg());
627 Register SrcReg = SrcMI->getOperand(1).getReg();
632 .addUse(SrcReg, getRegState(SrcMI->getOperand(1)))
782 MachineInstr *SrcMI = MRI->getUniqueVRegDef(InputReg);
784 DeadInstrs.insert(SrcMI);
785 while (SrcMI && SrcMI->isFullCopy() &&
786 MRI->hasOneNonDBGUse(SrcMI->getOperand(1).getReg())) {
787 SrcMI = MRI->getUniqueVRegDef(SrcMI->getOperand(1).getReg());
788 DeadInstrs.insert(SrcMI);
791 if (!SrcMI)
795 auto getSXTWSrcReg = [](MachineInstr *SrcMI) -> Register {
796 if (SrcMI->getOpcode() != AArch64::SBFMXri ||
797 SrcMI->getOperand(2).getImm() != 0 ||
798 SrcMI->getOperand(3).getImm() != 31)
800 return SrcMI->getOperand(1).getReg();
803 auto getUXTWSrcReg = [&](MachineInstr *SrcMI) -> Register {
804 if (SrcMI->getOpcode() != AArch64::SUBREG_TO_REG ||
805 SrcMI->getOperand(3).getImm() != AArch64::sub_32 ||
806 !MRI->hasOneNonDBGUse(SrcMI->getOperand(2).getReg()))
808 MachineInstr *Orr = MRI->getUniqueVRegDef(SrcMI->getOperand(2).getReg());
821 Register SrcReg = getSXTWSrcReg(SrcMI);
823 SrcReg = getUXTWSrcReg(SrcMI);