Lines Matching defs:ZeroReg
4876 unsigned Opcode, unsigned ZeroReg,
4891 MIB.addReg(ZeroReg);
6371 unsigned CombineOpc, unsigned ZeroReg = 0,
6390 if (MI->getOperand(3).getReg() != ZeroReg)
6404 unsigned MulOpc, unsigned ZeroReg) {
6405 return canCombine(MBB, MO, MulOpc, ZeroReg, true);
6546 auto setFound = [&](int Opcode, int Operand, unsigned ZeroReg,
6548 if (canCombineWithMUL(MBB, Root.getOperand(Operand), Opcode, ZeroReg)) {
7497 unsigned BitSize, OrrOpc, ZeroReg;
7502 ZeroReg = AArch64::WZR;
7509 ZeroReg = AArch64::XZR;
7531 .addReg(ZeroReg)
7559 unsigned SubOpc, ZeroReg;
7563 ZeroReg = AArch64::WZR;
7569 ZeroReg = AArch64::XZR;
7577 .addReg(ZeroReg)
7607 unsigned BitSize, OrrOpc, ZeroReg;
7612 ZeroReg = AArch64::WZR;
7619 ZeroReg = AArch64::XZR;
7640 .addReg(ZeroReg)