AArch64ISelLowering.cpp - OpenGrok cross reference for /llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines Matching defs:WhichResult
13284 static bool isZIP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {
13288   WhichResult = (M[0] == 0 ? 0 : 1);
13289   unsigned Idx = WhichResult * NumElts / 2;
13303 static bool isUZP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {
13305   WhichResult = (M[0] == 0 ? 0 : 1);
13307     unsigned Idx = WhichResult;
13322 static bool isTRN_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {
13326   WhichResult = (M[0] == 0 ? 0 : 1);
13328     if ((M[i] >= 0 && (unsigned)M[i] != i + WhichResult) ||
13329         (M[i + 1] >= 0 && (unsigned)M[i + 1] != i + WhichResult))
13937   unsigned WhichResult;
13938   if (isZIPMask(ShuffleMask, NumElts, WhichResult)) {
13939     unsigned Opc = (WhichResult == 0) ? AArch64ISD::ZIP1 : AArch64ISD::ZIP2;
13942   if (isUZPMask(ShuffleMask, NumElts, WhichResult)) {
13943     unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;
13946   if (isTRNMask(ShuffleMask, NumElts, WhichResult)) {
13947     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;
13951   if (isZIP_v_undef_Mask(ShuffleMask, VT, WhichResult)) {
13952     unsigned Opc = (WhichResult == 0) ? AArch64ISD::ZIP1 : AArch64ISD::ZIP2;
13955   if (isUZP_v_undef_Mask(ShuffleMask, VT, WhichResult)) {
13956     unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;
13959   if (isTRN_v_undef_Mask(ShuffleMask, VT, WhichResult)) {
13960     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;
29485   unsigned WhichResult;
29486   if (isZIPMask(ShuffleMask, VT.getVectorNumElements(), WhichResult) &&
29487       WhichResult == 0)
29491   if (isTRNMask(ShuffleMask, VT.getVectorNumElements(), WhichResult)) {
29492     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;
29497   if (isZIP_v_undef_Mask(ShuffleMask, VT, WhichResult) && WhichResult == 0)
29501   if (isTRN_v_undef_Mask(ShuffleMask, VT, WhichResult)) {
29502     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;
29534     if (isZIPMask(ShuffleMask, VT.getVectorNumElements(), WhichResult) &&
29535         WhichResult != 0)
29539     if (isUZPMask(ShuffleMask, VT.getVectorNumElements(), WhichResult)) {
29540       unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;
29545     if (isZIP_v_undef_Mask(ShuffleMask, VT, WhichResult) && WhichResult != 0)
29549     if (isUZP_v_undef_Mask(ShuffleMask, VT, WhichResult)) {
29550       unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;