Lines Matching defs:RPI
3011 RegPairInfo RPI;
3012 RPI.Reg1 = CSI[i].getReg();
3014 if (AArch64::GPR64RegClass.contains(RPI.Reg1)) {
3015 RPI.Type = RegPairInfo::GPR;
3016 RPI.RC = &AArch64::GPR64RegClass;
3017 } else if (AArch64::FPR64RegClass.contains(RPI.Reg1)) {
3018 RPI.Type = RegPairInfo::FPR64;
3019 RPI.RC = &AArch64::FPR64RegClass;
3020 } else if (AArch64::FPR128RegClass.contains(RPI.Reg1)) {
3021 RPI.Type = RegPairInfo::FPR128;
3022 RPI.RC = &AArch64::FPR128RegClass;
3023 } else if (AArch64::ZPRRegClass.contains(RPI.Reg1)) {
3024 RPI.Type = RegPairInfo::ZPR;
3025 RPI.RC = &AArch64::ZPRRegClass;
3026 } else if (AArch64::PPRRegClass.contains(RPI.Reg1)) {
3027 RPI.Type = RegPairInfo::PPR;
3028 RPI.RC = &AArch64::PPRRegClass;
3029 } else if (RPI.Reg1 == AArch64::VG) {
3030 RPI.Type = RegPairInfo::VG;
3031 RPI.RC = &AArch64::FIXED_REGSRegClass;
3039 AArch64InstrInfo::isFpOrNEON(RPI.Reg1))
3041 LastReg = RPI.Reg1;
3043 int Scale = TRI->getSpillSize(*RPI.RC);
3048 switch (RPI.Type) {
3051 !invalidateRegisterPairing(RPI.Reg1, NextReg, IsWindows,
3054 RPI.Reg2 = NextReg;
3058 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI,
3060 RPI.Reg2 = NextReg;
3064 RPI.Reg2 = NextReg;
3070 ((RPI.Reg1 - AArch64::Z0) & 1) == 0 && (NextReg == RPI.Reg1 + 1)) {
3075 RPI.Reg2 = NextReg;
3089 assert((!RPI.isPaired() ||
3093 assert((!RPI.isPaired() || !NeedsFrameRecord || RPI.Reg2 != AArch64::FP ||
3094 RPI.Reg1 == AArch64::LR) &&
3098 assert((!RPI.isPaired() || !NeedsFrameRecord || RPI.Reg1 != AArch64::FP ||
3099 RPI.Reg2 == AArch64::LR) &&
3107 (RPI.isPaired() &&
3108 ((RPI.Reg1 == AArch64::LR && RPI.Reg2 == AArch64::FP) ||
3109 RPI.Reg1 + 1 == RPI.Reg2))) &&
3112 RPI.FrameIdx = CSI[i].getFrameIdx();
3114 RPI.isPaired()) // RPI.FrameIdx must be the lower index of the pair
3115 RPI.FrameIdx = CSI[i + RegInc].getFrameIdx();
3117 int OffsetPre = RPI.isScalable() ? ScalableByteOffset : ByteOffset;
3120 if (RPI.isScalable())
3121 ScalableByteOffset += StackFillDir * (RPI.isPaired() ? 2 * Scale : Scale);
3123 ByteOffset += StackFillDir * (RPI.isPaired() ? 2 * Scale : Scale);
3128 ((!IsWindows && RPI.Reg2 == AArch64::FP) ||
3129 (IsWindows && RPI.Reg2 == AArch64::LR)))
3134 if (NeedGapToAlignStack && !NeedsWinCFI && !RPI.isScalable() &&
3135 RPI.Type != RegPairInfo::FPR128 && !RPI.isPaired() &&
3138 assert(MFI.getObjectAlign(RPI.FrameIdx) <= Align(16));
3142 MFI.setObjectAlignment(RPI.FrameIdx, Align(16));
3146 int OffsetPost = RPI.isScalable() ? ScalableByteOffset : ByteOffset;
3155 ((!IsWindows && RPI.Reg2 == AArch64::FP) ||
3156 (IsWindows && RPI.Reg2 == AArch64::LR)))
3158 RPI.Offset = Offset / Scale;
3160 assert((!RPI.isPaired() ||
3161 (!RPI.isScalable() && RPI.Offset >= -64 && RPI.Offset <= 63) ||
3162 (RPI.isScalable() && RPI.Offset >= -256 && RPI.Offset <= 255)) &&
3166 if (RPI.isPaired())
3167 return IsWindows ? RPI.Reg1 == AArch64::FP && RPI.Reg2 == AArch64::LR
3168 : RPI.Reg1 == AArch64::LR && RPI.Reg2 == AArch64::FP;
3176 return i > 0 && RPI.Reg1 == AArch64::FP &&
3185 RegPairs.push_back(RPI);
3186 if (RPI.isPaired())
3224 for (auto &RPI : RegPairs) {
3225 MIB.addReg(RPI.Reg1);
3226 MIB.addReg(RPI.Reg2);
3229 if (!MRI.isReserved(RPI.Reg1))
3230 MBB.addLiveIn(RPI.Reg1);
3231 if (RPI.isPaired() && !MRI.isReserved(RPI.Reg2))
3232 MBB.addLiveIn(RPI.Reg2);
3237 for (const RegPairInfo &RPI : llvm::reverse(RegPairs)) {
3238 unsigned Reg1 = RPI.Reg1;
3239 unsigned Reg2 = RPI.Reg2;
3252 unsigned Size = TRI->getSpillSize(*RPI.RC);
3253 Align Alignment = TRI->getSpillAlign(*RPI.RC);
3254 switch (RPI.Type) {
3256 StrOpc = RPI.isPaired() ? AArch64::STPXi : AArch64::STRXui;
3259 StrOpc = RPI.isPaired() ? AArch64::STPDi : AArch64::STRDui;
3262 StrOpc = RPI.isPaired() ? AArch64::STPQi : AArch64::STRQui;
3265 StrOpc = RPI.isPaired() ? AArch64::ST1B_2Z_IMM : AArch64::STR_ZXI;
3295 AFI->setStreamingVGIdx(RPI.FrameIdx);
3301 AFI->setVGIdx(RPI.FrameIdx);
3328 AFI->setVGIdx(RPI.FrameIdx);
3333 if (RPI.isPaired()) dbgs() << ", " << printReg(Reg2, TRI);
3334 dbgs() << ") -> fi#(" << RPI.FrameIdx;
3335 if (RPI.isPaired()) dbgs() << ", " << RPI.FrameIdx + 1;
3343 unsigned FrameIdxReg1 = RPI.FrameIdx;
3344 unsigned FrameIdxReg2 = RPI.FrameIdx + 1;
3345 if (NeedsWinCFI && RPI.isPaired()) {
3350 if (RPI.isPaired() && RPI.isScalable()) {
3379 MIB.addReg(/*PairRegs*/ AArch64::Z0_Z1 + (RPI.Reg1 - AArch64::Z0));
3385 .addImm(RPI.Offset / 2) // [sp, #imm*2*vscale],
3397 if (RPI.isPaired()) {
3407 .addImm(RPI.Offset) // [sp, #offset*vscale],
3418 if (RPI.Type == RegPairInfo::ZPR || RPI.Type == RegPairInfo::PPR) {
3420 if (RPI.isPaired())
3450 for (auto &RPI : RegPairs) {
3451 MIB.addReg(RPI.Reg1, RegState::Define);
3452 MIB.addReg(RPI.Reg2, RegState::Define);
3468 for (const RegPairInfo &RPI : RegPairs) {
3469 unsigned Reg1 = RPI.Reg1;
3470 unsigned Reg2 = RPI.Reg2;
3481 unsigned Size = TRI->getSpillSize(*RPI.RC);
3482 Align Alignment = TRI->getSpillAlign(*RPI.RC);
3483 switch (RPI.Type) {
3485 LdrOpc = RPI.isPaired() ? AArch64::LDPXi : AArch64::LDRXui;
3488 LdrOpc = RPI.isPaired() ? AArch64::LDPDi : AArch64::LDRDui;
3491 LdrOpc = RPI.isPaired() ? AArch64::LDPQi : AArch64::LDRQui;
3494 LdrOpc = RPI.isPaired() ? AArch64::LD1B_2Z_IMM : AArch64::LDR_ZXI;
3503 if (RPI.isPaired()) dbgs() << ", " << printReg(Reg2, TRI);
3504 dbgs() << ") -> fi#(" << RPI.FrameIdx;
3505 if (RPI.isPaired()) dbgs() << ", " << RPI.FrameIdx + 1;
3511 unsigned FrameIdxReg1 = RPI.FrameIdx;
3512 unsigned FrameIdxReg2 = RPI.FrameIdx + 1;
3513 if (NeedsWinCFI && RPI.isPaired()) {
3519 if (RPI.isPaired() && RPI.isScalable()) {
3535 MIB.addReg(/*PairRegs*/ AArch64::Z0_Z1 + (RPI.Reg1 - AArch64::Z0),
3542 .addImm(RPI.Offset / 2) // [sp, #imm*2*vscale]
3552 if (RPI.isPaired()) {
3560 .addImm(RPI.Offset) // [sp, #offset*vscale]