Lines Matching defs:WantResult
205 bool WantResult = true, bool IsZExt = false);
208 bool WantResult = true);
211 bool WantResult = true);
215 bool WantResult = true);
219 bool WantResult = true);
236 bool SetFlags = false, bool WantResult = true,
240 bool SetFlags = false, bool WantResult = true,
243 bool WantResult = true);
246 bool WantResult = true);
1169 bool WantResult, bool IsZExt) {
1223 WantResult);
1226 WantResult);
1229 ResultReg = emitAddSub_ri(UseAdd, RetVT, LHSReg, 0, SetFlags, WantResult);
1241 SetFlags, WantResult);
1260 ShiftVal, SetFlags, WantResult);
1283 ShiftVal, SetFlags, WantResult);
1298 return emitAddSub_rr(UseAdd, RetVT, LHSReg, RHSReg, SetFlags, WantResult);
1303 bool WantResult) {
1324 if (WantResult)
1340 bool WantResult) {
1369 if (WantResult)
1387 bool WantResult) {
1410 if (WantResult)
1429 bool WantResult) {
1454 if (WantResult)
1493 return emitSub(RetVT, LHS, RHS, /*SetFlags=*/true, /*WantResult=*/false,
1499 /*SetFlags=*/true, /*WantResult=*/false) != 0;
1536 bool SetFlags, bool WantResult, bool IsZExt) {
1537 return emitAddSub(/*UseAdd=*/true, RetVT, LHS, RHS, SetFlags, WantResult,
1565 bool SetFlags, bool WantResult, bool IsZExt) {
1566 return emitAddSub(/*UseAdd=*/false, RetVT, LHS, RHS, SetFlags, WantResult,
1571 unsigned RHSReg, bool WantResult) {
1573 /*SetFlags=*/true, WantResult);
1579 uint64_t ShiftImm, bool WantResult) {
1581 ShiftImm, /*SetFlags=*/true, WantResult);
3731 /*WantResult=*/false);
3740 /*WantResult=*/false);
3768 emitSubs_rr(VT, AArch64::XZR, UMULHReg, /*WantResult=*/false);