Lines Matching defs:AArch64FastISel
81 class AArch64FastISel final : public FastISel {
284 explicit AArch64FastISel(FunctionLoweringInfo &FuncInfo,
337 CCAssignFn *AArch64FastISel::CCAssignFnForCall(CallingConv::ID CC) const {
349 unsigned AArch64FastISel::fastMaterializeAlloca(const AllocaInst *AI) {
373 unsigned AArch64FastISel::materializeInt(const ConstantInt *CI, MVT VT) {
390 unsigned AArch64FastISel::materializeFP(const ConstantFP *CFP, MVT VT) {
445 unsigned AArch64FastISel::materializeGV(const GlobalValue *GV) {
540 unsigned AArch64FastISel::fastMaterializeConstant(const Constant *C) {
564 unsigned AArch64FastISel::fastMaterializeFloatZero(const ConstantFP* CFP) {
594 bool AArch64FastISel::computeAddress(const Value *Obj, Address &Addr, Type *Ty)
939 bool AArch64FastISel::computeCallAddress(const Value *V, Address &Addr) {
988 bool AArch64FastISel::isTypeLegal(Type *Ty, MVT &VT) {
1012 bool AArch64FastISel::isTypeSupported(Type *Ty, MVT &VT, bool IsVectorAllowed) {
1027 bool AArch64FastISel::isValueAvailable(const Value *V) const {
1035 bool AArch64FastISel::simplifyAddress(Address &Addr, MVT VT) {
1127 void AArch64FastISel::addLoadStoreOperands(Address &Addr,
1167 unsigned AArch64FastISel::emitAddSub(bool UseAdd, MVT RetVT, const Value *LHS,
1301 unsigned AArch64FastISel::emitAddSub_rr(bool UseAdd, MVT RetVT, unsigned LHSReg,
1338 unsigned AArch64FastISel::emitAddSub_ri(bool UseAdd, MVT RetVT, unsigned LHSReg,
1383 unsigned AArch64FastISel::emitAddSub_rs(bool UseAdd, MVT RetVT, unsigned LHSReg,
1425 unsigned AArch64FastISel::emitAddSub_rx(bool UseAdd, MVT RetVT, unsigned LHSReg,
1469 bool AArch64FastISel::emitCmp(const Value *LHS, const Value *RHS, bool IsZExt) {
1491 bool AArch64FastISel::emitICmp(MVT RetVT, const Value *LHS, const Value *RHS,
1497 bool AArch64FastISel::emitICmp_ri(MVT RetVT, unsigned LHSReg, uint64_t Imm) {
1502 bool AArch64FastISel::emitFCmp(MVT RetVT, const Value *LHS, const Value *RHS) {
1535 unsigned AArch64FastISel::emitAdd(MVT RetVT, const Value *LHS, const Value *RHS,
1546 unsigned AArch64FastISel::emitAdd_ri_(MVT VT, unsigned Op0, int64_t Imm) {
1564 unsigned AArch64FastISel::emitSub(MVT RetVT, const Value *LHS, const Value *RHS,
1570 unsigned AArch64FastISel::emitSubs_rr(MVT RetVT, unsigned LHSReg,
1576 unsigned AArch64FastISel::emitSubs_rs(MVT RetVT, unsigned LHSReg,
1584 unsigned AArch64FastISel::emitLogicalOp(unsigned ISDOpc, MVT RetVT,
1662 unsigned AArch64FastISel::emitLogicalOp_ri(unsigned ISDOpc, MVT RetVT,
1707 unsigned AArch64FastISel::emitLogicalOp_rs(unsigned ISDOpc, MVT RetVT,
1749 unsigned AArch64FastISel::emitAnd_ri(MVT RetVT, unsigned LHSReg,
1754 unsigned AArch64FastISel::emitLoad(MVT VT, MVT RetVT, Address Addr,
1891 bool AArch64FastISel::selectAddSub(const Instruction *I) {
1917 bool AArch64FastISel::selectLogicalOp(const Instruction *I) {
1946 bool AArch64FastISel::selectLoad(const Instruction *I) {
2057 bool AArch64FastISel::emitStoreRelease(MVT VT, unsigned SrcReg,
2079 bool AArch64FastISel::emitStore(MVT VT, unsigned SrcReg, Address Addr,
2147 bool AArch64FastISel::selectStore(const Instruction *I) {
2261 bool AArch64FastISel::emitCompareAndBranch(const BranchInst *BI) {
2386 bool AArch64FastISel::selectBranch(const Instruction *I) {
2515 bool AArch64FastISel::selectIndirectBr(const Instruction *I) {
2537 bool AArch64FastISel::selectCmp(const Instruction *I) {
2623 bool AArch64FastISel::optimizeSelect(const SelectInst *SI) {
2675 bool AArch64FastISel::selectSelect(const Instruction *I) {
2795 bool AArch64FastISel::selectFPExt(const Instruction *I) {
2811 bool AArch64FastISel::selectFPTrunc(const Instruction *I) {
2828 bool AArch64FastISel::selectFPToInt(const Instruction *I, bool Signed) {
2861 bool AArch64FastISel::selectIntToFP(const Instruction *I, bool Signed) {
2904 bool AArch64FastISel::fastLowerArguments() {
3016 bool AArch64FastISel::processCallArgs(CallLoweringInfo &CLI,
3106 bool AArch64FastISel::finishCall(CallLoweringInfo &CLI, unsigned NumBytes) {
3142 bool AArch64FastISel::fastLowerCall(CallLoweringInfo &CLI) {
3292 bool AArch64FastISel::isMemCpySmall(uint64_t Len, MaybeAlign Alignment) {
3299 bool AArch64FastISel::tryEmitSmallMemCpy(Address Dest, Address Src,
3354 bool AArch64FastISel::foldXALUIntrinsic(AArch64CC::CondCode &CC,
3442 bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
3847 bool AArch64FastISel::selectRet(const Instruction *I) {
3951 bool AArch64FastISel::selectTrunc(const Instruction *I) {
4016 unsigned AArch64FastISel::emiti1Ext(unsigned SrcReg, MVT DestVT, bool IsZExt) {
4049 unsigned AArch64FastISel::emitMul_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
4067 unsigned AArch64FastISel::emitSMULL_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
4075 unsigned AArch64FastISel::emitUMULL_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
4083 unsigned AArch64FastISel::emitLSL_rr(MVT RetVT, unsigned Op0Reg,
4107 unsigned AArch64FastISel::emitLSL_ri(MVT RetVT, MVT SrcVT, unsigned Op0,
4185 unsigned AArch64FastISel::emitLSR_rr(MVT RetVT, unsigned Op0Reg,
4210 unsigned AArch64FastISel::emitLSR_ri(MVT RetVT, MVT SrcVT, unsigned Op0,
4301 unsigned AArch64FastISel::emitASR_rr(MVT RetVT, unsigned Op0Reg,
4326 unsigned AArch64FastISel::emitASR_ri(MVT RetVT, MVT SrcVT, unsigned Op0,
4406 unsigned AArch64FastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
4515 bool AArch64FastISel::optimizeIntExtLoad(const Instruction *I, MVT RetVT,
4569 bool AArch64FastISel::selectIntExt(const Instruction *I) {
4615 bool AArch64FastISel::selectRem(const Instruction *I, unsigned ISDOpcode) {
4656 bool AArch64FastISel::selectMul(const Instruction *I) {
4726 bool AArch64FastISel::selectShift(const Instruction *I) {
4812 bool AArch64FastISel::selectBitCast(const Instruction *I) {
4852 bool AArch64FastISel::selectFRem(const Instruction *I) {
4890 bool AArch64FastISel::selectSDiv(const Instruction *I) {
4959 unsigned AArch64FastISel::getRegForGEPIndex(const Value *Idx) {
4979 bool AArch64FastISel::selectGetElementPtr(const Instruction *I) {
5044 bool AArch64FastISel::selectAtomicCmpXchg(const AtomicCmpXchgInst *I) {
5111 bool AArch64FastISel::fastSelectInstruction(const Instruction *I) {
5203 return new AArch64FastISel(FuncInfo, LibInfo);