Lines Matching defs:WS
32 WriteRef::WriteRef(unsigned SourceIndex, WriteState *WS)
34 Write(WS) {}
112 for (WriteState &WS : IS->getDefs()) {
113 if (WS.isEliminated())
116 MCPhysReg RegID = WS.getRegisterID();
123 assert(WS.getCyclesLeft() != UNKNOWN_CYCLES &&
125 assert(WS.getCyclesLeft() <= 0 && "Invalid cycles left for this write!");
132 if (WR.getWriteState() == &WS)
137 if (OtherWR.getWriteState() == &WS)
141 if (!WS.clearsSuperRegisters())
146 if (OtherWR.getWriteState() == &WS)
235 WriteState &WS = *Write.getWriteState();
236 MCPhysReg RegID = WS.getRegisterID();
261 bool IsWriteZero = WS.isWriteZero();
262 bool IsEliminated = WS.isEliminated();
265 WS.setPRF(RRI.IndexPlusCost.first);
271 if (!WS.clearsSuperRegisters()) {
281 OtherWS->addUser(OtherWrite.getSourceIndex(), &WS);
288 WS.clearsSuperRegisters() ? RegID : WS.getRegisterID();
302 if (OtherWS->getLatency() > WS.getLatency()) {
326 if (!WS.clearsSuperRegisters())
340 const WriteState &WS, MutableArrayRef<unsigned> FreedPhysRegs) {
343 if (WS.isEliminated())
346 MCPhysReg RegID = WS.getRegisterID();
353 assert(WS.getCyclesLeft() != UNKNOWN_CYCLES &&
355 assert(WS.getCyclesLeft() <= 0 && "Invalid cycles left for this write!");
357 bool ShouldFreePhysRegs = !WS.isWriteZero();
362 if (!WS.clearsSuperRegisters()) {
372 if (WR.getWriteState() == &WS)
377 if (OtherWR.getWriteState() == &WS)
381 if (!WS.clearsSuperRegisters())
386 if (OtherWR.getWriteState() == &WS)
391 bool RegisterFile::canEliminateMove(const WriteState &WS, const ReadState &RS,
394 const RegisterMapping &RMTo = RegisterMappings[WS.getRegisterID()];
425 if (RRITo.RenameAs && RRITo.RenameAs != WS.getRegisterID())
426 if (!WS.clearsSuperRegisters())
458 const WriteState &WS = Writes[E - (I + 1)];
459 if (!canEliminateMove(WS, RS, RegisterFileIndex))
465 WriteState &WS = Writes[E - (I + 1)];
468 const RegisterMapping &RMTo = RegisterMappings[WS.getRegisterID()];
475 MCPhysReg AliasReg = RRITo.RenameAs ? RRITo.RenameAs : WS.getRegisterID();
487 WS.setWriteZero();
491 WS.setEliminated();
567 const WriteState &WS = *WR.getWriteState();
569 << MRI.getName(WS.getRegisterID()) << " (defined by instruction #"
588 const WriteState *WS = WR.getWriteState();
589 unsigned WriteResID = WS->getWriteResourceID();
592 if (WS->getCyclesLeft() == UNKNOWN_CYCLES) {
601 int CyclesLeft = WS->getCyclesLeft() - ReadAdvance;
650 WriteState &WS = *WR.getWriteState();
652 WS.addUser(WR.getSourceIndex(), &RS, ReadAdvance);