Lines Matching defs:ItinData

1444 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
1447   if (!ItinData || ItinData->isEmpty())
1455     return ItinData->getOperandCycle(DefClass, DefIdx);
1457   return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
1460 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
1462   if (!ItinData || ItinData->isEmpty())
1468   return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass());
1475 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,
1477   if (!ItinData || ItinData->isEmpty())
1481   int UOps = ItinData->Itineraries[Class].NumMicroOps;
1506 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
1511   if (!ItinData)
1514   return ItinData->getStageLatency(MI.getDesc().getSchedClass());
1520   const InstrItineraryData *ItinData = SchedModel.getInstrItineraries();
1521   if (!ItinData || ItinData->isEmpty())
1526       ItinData->getOperandCycle(DefClass, DefIdx);
1646     const InstrItineraryData *ItinData, const MachineInstr &DefMI,
1650   return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);