Lines Matching defs:RegIdx
470 VNInfo *SplitEditor::defValue(unsigned RegIdx,
477 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
486 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), FP));
488 // This was the first time (RegIdx, ParentVNI) was mapped, and it is not
507 void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo &ParentVNI) {
508 ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI.id)];
520 addDeadDef(LIS.getInterval(Edit->get(RegIdx)), VNI, false);
547 MachineBasicBlock::iterator InsertBefore, bool Late, unsigned RegIdx) {
561 LiveInterval &DestLI = LIS.getInterval(Edit->get(RegIdx));
591 VNInfo *SplitEditor::defFromParent(unsigned RegIdx, const VNInfo *ParentVNI,
595 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
598 // so always begin RegIdx 0 early and all others late.
599 bool Late = RegIdx != 0;
602 Register Original = VRM.getOriginal(Edit->get(RegIdx));
636 Def = buildCopy(Edit->getReg(), Reg, LaneMask, MBB, I, Late, RegIdx);
641 return defValue(RegIdx, ParentVNI, Def, false);
808 unsigned RegIdx = 0;
809 Register Reg = LIS.getInterval(Edit->get(RegIdx)).reg();
810 VNInfo *VNI = defFromParent(RegIdx, ParentVNI, Start, MBB,
883 unsigned RegIdx = AssignI.value();
892 LLVM_DEBUG(dbgs() << " cannot find simple kill of RegIdx " << RegIdx
894 forceRecompute(RegIdx, *Edit->getParent().getVNInfoAt(Def));
1013 // Get the complement interval, always RegIdx 0.
1141 // RegAssign has holes where RegIdx 0 should be used.
1145 unsigned RegIdx;
1148 RegIdx = 0;
1150 RegIdx = AssignI.value();
1156 RegIdx = 0;
1160 // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
1161 LLVM_DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx << '('
1162 << printReg(Edit->get(RegIdx)) << ')');
1163 LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx));
1166 ValueForcePair VFP = Values.lookup(std::make_pair(RegIdx, ParentVNI->id));
1182 LiveIntervalCalc &LIC = getLICalc(RegIdx);
1184 // This value has multiple defs in RegIdx, but it wasn't rematerialized,
1284 unsigned RegIdx = RegAssign.lookup(V->def);
1285 LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx));
1286 LiveIntervalCalc &LIC = getLICalc(RegIdx);
1299 unsigned RegIdx = RegAssign.lookup(V->def);
1300 LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx));
1319 : MO(O), RegIdx(R), Next(N) {}
1322 unsigned RegIdx;
1346 unsigned RegIdx = RegAssign.lookup(Idx);
1347 LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx));
1350 << '\t' << Idx << ':' << RegIdx << '\t' << *MI);
1396 ExtPoints.push_back(ExtPoint(MO, RegIdx, Next));
1398 LiveIntervalCalc &LIC = getLICalc(RegIdx);
1404 LiveInterval &LI = LIS.getInterval(Edit->get(EP.RegIdx));
1512 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
1513 defValue(RegIdx, ParentVNI, ParentVNI->def, true);